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[悲恸,绝望,崩溃] 创新,有时会气死人吗?(霍尔尼 Hoerni 的平面工艺 planar)
一、“老和山下的小学僧”安慰我们
芯片加工精度已经到了7nm,虽然三星吹牛说要烧到3nm,可那又如何?你还能继续烧吗?1nm差不多就是几个原子而已,量子效应非常显著,近似理论就不好使了,电子的行为更加难以预测,半导体行业就得在这儿歇菜。
烧钱也好,烧时间也罢,烧到尽头就是理论物理。基础科学除了烧钱烧时间,还得烧人,烧的异常惨烈,100个高智商,99个都是垫脚石!
http://news.eeworld.com.cn/mp/EEWorld/a51998.jspx
https://zhuanlan.zhihu.com/p/43626576
二、现代集成电路的3位代表性人物
在集成电路(芯片)历史上,基尔比主要贡献了思想,诺伊斯贡献了实用电路。在诺伊斯的集成电路中,霍尔尼(Jean Amédée Hoerni)的“平面工艺 planar manufacturing process”起了重要作用。
“In January 1959, Noyce develops his integrated circuit using the process of planar technology, developed by a colleague, Jean Hoerni. 1959年1月,诺伊斯利用他的同事让·霍尔尼开发的平面技术开发了他的集成电路。”
在美国工程技术界评出二十世纪最伟大的 20项工程技术成就“Electronics 电子技术”时间表里,《1958-1959 Integrated circuit invented 1958年-1959年发明集成电路》
http://www.greatachievements.org/?id=3956
只提到了基尔比、诺伊斯、霍尔尼(Jean Améd́ée Hoerni) 3 人。
三、霍尔尼 Hoerni 的平面工艺
https://ieeexplore.ieee.org/document/4390023
由“机器翻译”将英语译成汉语。
It was a brilliant conception but too far ahead of its time. Hoerni’s approach would require additional fabrication steps, and making mesa transistors was already at the limits of the possible. Bell Labs and Western Electric had produced prototypes of mesas, but no company had sold one on the open market.
这是一个绝妙的构想,但太超前了。Hoerni 的方法需要额外的制造步骤,而制作台面晶体管已经达到了可能的极限。贝尔实验室和西方电气公司生产了台面的原型,但没有一家公司在公开市场上出售。
But he was also a hardheaded contrarian whose creative fires were stoked by adversity. Hoerni not only didn’t give up, he set out to develop an even better transistor. Later that year, he returned to the ideas written down in the opening pages of his notebook. Could the oxide layer in fact be used to protect the sensitive p-n junctions? There were indications it might. That spring, reports had come in from Bell Labs that the oxide layer indeed protected the silicon underneath. Why not the junctions, too?
With a doctorate in crystal physics, Hoerni realized that the impurity atoms coming through the tiny openings in the oxide layer would diffuse sideways nearly as well as downward into silicon’s crystal structure. Which meant that the junction interfaces would curl up under the oxide layer surrounding an opening, just micrometers farther out from its edges. If left in place instead of being etched away, he figured, the oxide layer could protect those junctions.
But the device Hoerni envisioned would not only be more difficult to fabricate, its structure flew in the face of conventional wisdom. Especially at Bell Labs and Western Electric, the oxide layer was considered ”dirty”—filled with impurities after the diffusion process—and thus had to be removed.
但他也是一个固执的逆向投资者,逆境激发了他的创造力。Hoerni 不仅没有放弃,他还着手开发一种更好的晶体管。那年晚些时候,他又回到了笔记本开头几页写下的想法。氧化物层实际上可以用来保护敏感的 p-n 结吗?有迹象表明它可能。那年春天,贝尔实验室的报告称,氧化层确实保护了下面的硅。为什么交叉路口也不呢?
拥有晶体物理学博士学位的 Hoerni 意识到,通过氧化物层中的微小开口进入的杂质原子会向侧面扩散,几乎向下扩散到硅的晶体结构中。这意味着结界面将在开口周围的氧化物层下卷曲,离开口边缘只有几微米远。他认为,如果留在原地而不是被蚀刻掉,氧化物层可以保护这些结。
但 Hoerni 设想的装置不仅更难制造,其结构也与传统智慧背道而驰。特别是在贝尔实验室和西部电气公司,氧化物层被认为是“脏的”——在扩散过程后充满了杂质——因此必须去除。
Fairchild eventually licensed the planar process to other transistor makers—even Bell Labs and Western Electric. Either the other firms followed Fairchild’s lead or they exited the industry.
仙童最终将这种平面工艺授权给了其他晶体管制造商,甚至贝尔实验室和西部电气公司。其他公司要么效仿仙童,要么退出该行业。
图1 MESA VS. PLANAR: Side views of a mesa [left] and a planar transistor, from a report Hoerni prepared in 1960.
MESA与平面晶体管:Hoerni 在1960年编写的一份报告中的台面[左]和平面晶体管的侧视图。
参考资料:
[1] Electronics Timeline, 20th century's greatest engineering achievements
http://www.greatachievements.org/?id=3956
[2] Micharl Riordan. The Silicon Dioxide Solution, How physicist Jean Hoerni built the bridge from the transistor to the integrated circuit [J]. IEEE Spectrum, 2007, 44(12): 51-56.
doi: 10.1109/MSPEC.2007.4390023
https://ieeexplore.ieee.org/document/4390023
[3] Michael Riordan. How Bell Labs Missed the Microchip, The man who pioneered the transistor never appreciated its full [J]. IEEE Spectrum, 2007, 44(12): 51-56.
doi: 10.1109/MSPEC.2006.253406
https://ieeexplore.ieee.org/document/4025617
相关链接:
[1] 2023-08-29,[小资料] 1959年霍尔尼(Jean Amedee Hoerni)的平面工艺专利(图片)
https://blog.sciencenet.cn/blog-107667-1400737.html
[2] 2023-11-13,[打听] 继晶体管、集成电路之后,电路重大突破会出现在哪里?
https://blog.sciencenet.cn/blog-107667-1409521.html
[3] 2023-08-21,[征求意见稿] “半电路、半电磁场”电路:目标和现状
https://blog.sciencenet.cn/blog-107667-1399839.html
[4] 2023-09-07,[小资料] 1966年鲍尔(Robert W. Bower)申请的 MOSFET 自对准栅极工艺专利(图片)
https://blog.sciencenet.cn/blog-107667-1401852.html
[5] 2022-09-24,《信息革命的技术源流》第三轮阅读:创新真难!
https://blog.sciencenet.cn/blog-107667-1356669.html
[6] 2023-09-17,Zenas 公理:2023年汪波老师的《为什么芯片相关的发明最初总不受待见?》
https://blog.sciencenet.cn/blog-107667-1402929.html
[7] 2023-09-08,[小资料] 1966年 ~ 1998年“电子学 Electronics”重要事件
https://blog.sciencenet.cn/blog-107667-1401935.html
[8] 2023-08-02,[小资料] 1952年杜默(G. W. A. Dummer)提出“集成电路概念 Integrated Circuit Concept”
https://blog.sciencenet.cn/blog-107667-1397631.html
[9] 2023-10-27,[图片,小资料] 基尔比(Jack St. Clair Kilby)的第一个集成电路
https://blog.sciencenet.cn/blog-107667-1407513.html
[10] 2023-10-29,[图片,小资料] 诺伊斯(Robert Norton Noyce)的第一个集成电路
https://blog.sciencenet.cn/blog-107667-1407690.html
[11] 2023-09-09,[小资料] FinFET(鳍式场效应晶体管 fin field effect transistor)
https://blog.sciencenet.cn/blog-107667-1402038.html
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