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本文为美国乔治梅森大学(作者:Upendarreddy Mamidi)的硕士论文,共97页。
传统上,认证加密是通过使用两种不同的加密和认证算法来实现的。近年来,将加密和认证结合在一起的模式被提出。在硬件实现的情况下,该特性尤其有益,因为与传统方案相比,它允许电路面积和功率的大幅减少。在本论文中,我们首先描述了认证加密具有竞争力的候选方案,这些方案具备安全性、适用性和健壮性(CAESAR)。然后我们讨论了来自第一轮提交的轻量级候选方案,即ACORN、SILC(简单轻量级CFB)和Joltik。我们首先针对Xilinx Spartan-6和Artix-7 FPGA实现了这些候选器件的全带宽设计。稍后,我们将针对低面积应用优化这些设计。最后,我们将实现的结果与其他发布的结果进行比较。
Traditionally, authenticated encryption wasachieved by using two seperate algorithms for encryption and authentication.Recently, modes that combine encryption and authentication together are beingproposed. This feature is especially beneficial in case of hardwareimplementations, as it allows for a substantial decrease in the circuit areaand power compared to traditional schemes. In this thesis, we firstcharacterize candidates of the Competition for Authenticated Encryption:Security, Applicability, and Robustness (CAESAR). Then we discuss light-weightcandidates from the round 1 submissions namely ACORN, SILC (SImple LightweightCFB) and Joltik. We first implement the full width designs of these candidatestargeting Xilinx Spartan-6 and Artix-7 FPGAs. Later, we optimize these designsfor low-area applications. Lastly, we compare the results of theimplementations with other published results.
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