陈立新 张琳 黄颖：中美欧日韩五局专利报告3551.docx

█武汉大学科教管理与评价研究中心 陈立新 张琳 黄颖

第二部分 2022年美国发明专利统计分析报告

18 世界主要机构在美国的专利布局

18.12 美光科技公司的美国局专利状况

2022年，美光科技公司获得美国发明专利1915项，比上一年增长了7%，是获得美国专利数量第12多的机构。

相对来讲，美光科技公司专利研发的优势领域是：计算机核心部件、计算机一般部件、半导体集成电路、半导体制造、计算机接口。其在这5个技术领域上的专利份额相对较高，为6.4%至2.2%。

表18.12-1 2022年美光科技公司主要技术领域的专利分布

	技术领域	专利数量	占比（%）
1	计算机核心部件	1043	6.4%
2	计算机一般部件	672	4.0%
3	半导体集成电路	333	3.4%
4	半导体制造	227	2.5%
5	计算机接口	387	2.2%
6	半导体元器件	361	2.0%
7	电气元件与电路	132	0.5%
8	计算机安全	35	0.5%
9	人工智能	53	0.4%
10	数字信息传输	28	0.3%
11	网络协议	72	0.3%
12	光电测量与核物理	33	0.3%
13	物理信号与控制	42	0.3%
14	数据与图像识别	31	0.2%
15	数据交换网络	20	0.2%
16	计算机应用与软件	25	0.2%
17	计算机辅助设计	4	0.2%
18	通信传输系统	17	0.2%
19	数据库与信息检索	24	0.2%
20	发电与输变电	16	0.1%

注：占比（%）指其在某领域上的专利数量占该领域的比例。

从绝对数量上来看，美光科技公司的重点技术领域是：计算机核心部件、计算机一般部件、计算机接口、半导体元器件、半导体集成电路。其在这5个技术领域上的专利数量最多，为1043至333项。

可见，美光科技公司的专利技术研发重点主要集中在计算机核心部件领域。

从发明人来看，2022年美光科技公司的研发人员较多，达到1600人，人均发明专利0.84项。其中，Troia Alberto、Mondello Antonino、Muchherla Kishore Kumar、Rayaprolu Vamsi Pavan、Parthasarathy Sivagnanam、Malshe Ashutosh、Hopkins John D.、Liu Haitao、Kale Poorna、Karda Kamal M.等人的专利数量较多，高达53至25项。

图18.12-1 2022年美光科技公司在20个相对优势领域中的专利占比

致谢

感谢大连理工大学刘则渊教授、河南师范大学梁立明教授、科技部中国科学技术发展战略研究院武夷山研究员对本报告的支持与帮助。同时，向以不同形式对本报告提出意见和建议的专家学者们表示诚挚的感谢。

附表18.12-1 2022年美光科技公司的美国局授权发明专利

Patent No.	Title	Inventors
11216058	Storage system deep idle power mode	Liang Qing; Parry Jonathan Scott
11216193	Prioritized security	Jean Sebastien Andre
11216218	Unmap data pattern for coarse mapping memory sub-system	Zhu Fangfang; Tai Ying Yu; Chen Ning; Zhu Jiangli; Tang Alex
11216219	Management of peak current of memory dies in a memory sub-system	Yu Liang; Aglubat John Paul; Rori Fulvio
11216333	Methods and devices for error correction	Schaefer Scott E.; Boehm Aaron P.
11216349	Reactive read based on metrics to screen defect prone memory blocks	Singidi Harish Reddy; Rayaprolu Vamsi Pavan; Muchherla Kishore Kumar;  Huang Jianmin; Luo Xiangang; Malshe Ashutosh
11216364	Sequential read optimization in a memory sub-system that programs  sequentially	Guda Chandra M.; Lam Johnny A.
11216395	Apparatuses and methods for asymmetric bi-directional signaling  incorporating multi-level encoding	Hollis Timothy
11216562	Double wrapping for verification	Markey Tim; Ruane James; Strong Robert W.
11217284	Memory with per pin input/output termination and driver impedance  calibration	Stave Eric J.
11217287	Selectively squelching differential strobe input signal in memory-device  testing system	Swanson Joel Scott
11217291	Circuitry borrowing for memory arrays	Martinelli Andrea; Mastroianni Francesco; Nakai Kiyoshi
11217292	Time-based access of a memory cell	Di Vincenzo Umberto
11217293	Reference voltage management	Bolandrina Efrem; Bedeschi Ferdinando
11217294	Techniques for adjusting current based on operating parameters	Chu Wei Lu; Pan Dong
11217295	Apparatuses and methods for address detection	Mazumder Kallol; Brown Jason M.; May Derek R.; Koelling Jeffrey E.;  Norwood Roger D.
11217296	Staggered refresh counters for a memory device	Wieduwilt Christopher G.; Rehmeyer James S.
11217297	Techniques for reducing row hammer refresh	He Yuan; Ito Yutaka
11217298	Delay-locked loop clock sharing	Oh Younghoon; Ho Michael V.
11217303	Imprint recovery for memory arrays	Strand Jonathan J.; Basuta Sukneet Singh; Bangalore Lakshman Shashank;  Harms Jonathan D.
11217306	Apparatuses and methods for sensing memory cells	Sforzin Marco; Amato Paolo
11217308	Programming memory cells using asymmetric current pulses	Robustelli Mattia; Tortorelli Innocenzo; Dodge Richard K.
11217310	Memory devices with distributed block select for a vertical string driver  tile architecture	Lee Eric N.
11217320	Bin placement according to program-erase cycles	Sheperek Michael; Kaynak Mustafa N.; Kientz Steven Michael
11217322	Drift mitigation with embedded refresh	Tortorelli Innocenzo; Pirovano Agostino; Redaelli Andrea; Pellizzer  Fabio; Wang Hongmei
11217325	Apparatuses and methods for providing internal double data rate operation  from external single data rate signals	Jhang Yuan Hsuan; Ishikawa Toru; Nakanishi Takuya
11217556	Packaged microelectronic devices having stacked interconnect elements and  methods for manufacturing the same	Kweon Young Do; Jiang Tongbi
11217588	Integrated assemblies comprising voids between active regions and  conductive shield plates, and methods of forming integrated assemblies	Sukekawa Mitsunari; Taketani Hiroaki
11217590	Semiconductor memory device and method of forming the same	Fujimoto Toshiyasu; Sasaki Takashi; Terada Shinobu
11217601	Microelectronic devices including staircase structures, and related  memory devices and electronic systems	Luo Shuangqiang; Li Xuan; Yii Adeline
11217737	Methods and apparatus providing thermal isolation of photonic devices	Meade Roy; Sandhu Gurtej
11218019	Power backup architecture using capacitor	Suljic Vehid; Rowley Matthew D.
11218330	Generating an identity for a computing device using a physical unclonable  function	Mondello Antonino; Troia Alberto
11219371	Determining biometric data using an array of infrared illuminators	Christensen Carla L.; Chhabra Bhumika; Hosseinimakarem Zahra
11221690	Virtual peripherals for mobile devices	de la Garza Villarreal Elsie; Delaney Claudia A.; Wale Madison E.;  Chhabra Bhumika
11221776	Metadata indication for a memory device	Ish Mark; Liu Yiran; Geukens Tom V.
11221797	Domain-based access in a memory device	Yudanov Dmitri A.; Jain Shanky Kumar
11221800	Adaptive and/or iterative operations in executing a read command to  retrieve data from memory cells	Fitzpatrick James; Parthasarathy Sivagnanam; Khayat Patrick Robert;  Alhussien AbdelHakim S.
11221873	Hierarchical memory apparatus	Ramesh Vijay S.; Korzh Anton; Murphy Richard C.
11221910	Media scrubber in memory system	Pawlowski Joseph Thomas
11221912	Mitigating an undetectable error when retrieving critical data during  error handling	Rayaprolu Vamsi Pavan; Parthasarathy Sivagnanam; Ratnam Sampath K.;  Nowell Shane; Padilla Renato C.
11221913	Error check and scrub for semiconductor memory device	Rooney Randall J.; Prather Matthew A.
11221933	Holdup self-tests for power loss operations on memory systems	Majerus Douglas; Byron Brent
11221949	Multi state purgatory for media management for a memory subsystem	Bianco Antonio David
11221973	Parallel iterator for machine learning frameworks	Jacob Jacob Mulamootil; Ramdasi Gaurav Sanjay; Mohamed Nabeel  Meeramohideen
11222260	Apparatuses and methods for operating neural networks	Lea Perry V.
11222668	Memory cell sensing stress mitigation	Vimercati Daniele; Mills Duane R.; Fackenthal Richard E.; Hattori Yasuko
11222669	Apparatuses and methods for performing operations using sense amplifiers  and intermediary circuitry	Hush Glen E.; Sun Honglin; Murphy Richard C.
11222673	Memory sub-system managing remapping for misaligned memory components	Porzio Luca; Di Pasqua Marco; Papa Paolo
11222680	Memory plate segmentation to reduce operating power	Kim Tae H.; Villa Corrado
11222682	Apparatuses and methods for providing refresh addresses	Enomoto Honoka; Morohashi Masaru
11222683	Apparatuses and methods for staggered timing of targeted refresh  operations	Rehmeyer James S.
11222686	Apparatuses and methods for controlling refresh timing	Noguchi Hidekazu
11222689	Multi-phase clock division	Penney Daniel B.
11222690	Vertical 3D single word line gain cell with shared read/write bit line	Karda Kamal M.; Liu Haitao; Sarpatwari Karthik; Ramaswamy Durai Vishak  Nirmal
11222692	Reflow protection	Jean Sebastien Andre; Luo Ting
11222695	Socket design for a memory device	Majumdar Amitava; Kotti Radhakrishna; Venigalla Rajasekhar
11222699	Two-part programming methods	Sarin Vishal; Vahidimowlavi Allahyar
11222702	Noise reduction during parallel plane access in a multi-plane memory  device	Pekny Theodore
11222704	Power state aware scan frequency	Rayaprolu Vamsi Pavan
11222708	Shared error detection and correction memory	Shibata Tomoyuki; Kondo Chikara; Tanaka Hiroyuki
11222710	Memory dice arrangement based on signal distribution	Chen Mikai; Zhou Zhenming; Shen Zhenlei; Lang Murong
11222762	Fuses, and methods of forming and using fuses	Redaelli Andrea; Servalli Giorgio
11222825	Integrated circuitry, memory arrays comprising strings of memory cells,  methods used in forming integrated circuitry, and methods used in forming a  memory array comprising strings of memory cells	Staller Corey; Chandolu Anilkumar
11222854	Multitier arrangements of integrated devices, and methods of protecting  memory cells during polishing	Bohra Mihir; Mudgal Tarun
11222868	Thermal transfer structures for semiconductor die assemblies	Schrock Ed A.
11222874	Discontinuous patterned bonds for semiconductor devices and associated  systems and methods	Schellhammer Scott D.; Odnoblyudov Vladimir; Frei Jeremy S.
11222975	Memory arrays with vertical transistors and the formation thereof	Simsek-Ege Fatma Arzum; Cole Steve V.; Derner Scott J.; Robbs Toby D.
11223014	Semiconductor structures including liners comprising alucone and related  methods	Song Zhe; Allen Tuman E.; Franklin Cole S.; Gealy Dan
11223282	Power management integrated circuit with bleed circuit control	Rowley Matthew David
11226646	DC voltage regulators with demand-driven power management	Kim Si Hong; Nam Ki-Jun
11226671	Power translator component	Rowley Matthew D.
11226767	Apparatus with access control mechanism and methods for operating the  same	Johnson Bret
11226770	Memory protocol	Walker Robert M.; Ross Frank F.
11226894	Host-based flash memory maintenance techniques	Palmer David Aaron; Gyllenskog Christian M.; Parry Jonathan Scott; Hanna  Stephen
11226896	Trim setting determination on a memory device	Thiruvengadam Aswin; Lowrance Daniel L.; Feeley Peter
11226907	Host-resident translation layer validity check techniques	Palmer David Aaron
11226920	Frame protocol of memory device	Johnson James Brian; Keeth Brent
11226926	Multi-level hierarchical routing matrices for pattern-recognition  processors	Noyes Harold B; Brown David R.
11227641	Arithmetic operations in memory	Ramesh Vijay S.
11227648	Multiple plate line architecture for multideck memory array	Bedeschi Ferdinando
11227649	Apparatuses and methods for staggered timing of targeted refresh  operations	Meier Nathaniel J.; Rehmeyer James S.
11227650	Delay circuitry with reduced instabilities	Huang Zhi Qi; Chu Wei Lu; Pan Dong
11227666	Track charge loss based on signal and noise characteristics of memory  cells collected in calibration operations	Parthasarathy Sivagnanam; Fitzpatrick James; Khayat Patrick Robert;  Alhussien AbdelHakim S.
11227777	Sacrificial separators for wafer level encapsulating	Kaeding John F.
11227861	Integrated assemblies comprising sense-amplifier-circuitry and  wordline-driver-circuitry under memory cells of a memory array	Fujisawa Hiroki; Ingalls Charles L.; Hill Richard J.; Sandhu Gurtej S.;  Derner Scott J.
11227864	Storage node after three-node access device formation for vertical three  dimensional (3D) memory	Saeedi Vahdat Armin; Smythe, III John A.; Lee Si-Woo; Sandhu Gurtej S.;  Sills Scott E.
11227866	Semiconductor device including capacitor and method of forming the same	Kaneko Akira
11227869	Memory array structures for capacitive sense NAND memory	Fukuzumi Yoshiaki; Fujiki Jun; Tanaka Shuji; Yoshida Masashi; Saito  Masanobu; Kamata Yoshihiko
11227972	Solid state lighting devices with dielectric insulation and methods of  manufacturing	Schellhammer Scott D.
11228443	Using memory as a block in a block chain	Troia Alberto; Mondello Antonino
11231834	Vehicle having an intelligent user interface	Bielby Robert Richard Noel
11231853	Memory including search logic	Patel Vipul
11231863	Block family-based error avoidance for memory devices	Sheperek Michael; Muchherla Kishore Kumar; Kaynak Mustafa N.; Rayaprolu  Vamsi Pavan; Liikanen Bruce A.; Feeley Peter; Koudele Larry J.; Nowell Shane;  Kientz Steven Michael
11231870	Memory sub-system retirement determination	Chen Mikai; Lang Murong; Zhou Zhenming
11231879	Dedicated design for testability paths for memory sub-system controller	Spica Michael Richard
11231928	Large data read techniques	Liang Qing; Grosz Nadav
11231982	Read window size	Hoei Jung Sheng; Feeley Peter Sean; Ratnam Sampath K.; Zildzic Sead;  Muchherla Kishore Kumar
11231995	Providing data of a memory system based on an adjustable error rate	Kaynak Mustafa N.; Koudele Larry J.; Sheperek Michael; Khayat Patrick R.;  Ratnam Sampath K.
11232028	Error-checking in namespaces on storage devices	Harris Byron D.; Schuh Karl D.
11232041	Memory addressing	Haswell Jonathan M.
11232049	Memory module with computation capability	Yudanov Dmitri
11232819	Biasing electronic components using adjustable circuitry	Porter John David; Tatapudi Suryanarayana B.
11232823	Full bias sensing in a memory array	Di Vincenzo Umberto; Bedeschi Ferdinando
11232828	Integrated memory assemblies comprising multiple memory array decks	Derner Scott J.; Ingalls Charles L.
11232829	Apparatuses and methods for sense line architectures for semiconductor  memories	Robbs Toby D.; Ingalls Charles L.
11232830	Auto-precharge for a memory bank stack	Mazumder Kallol; Gadamsetty Harish V.
11232849	Memory device with a repair match mechanism and methods for operating the  same	Wieduwilt Christopher G.
11232970	Semiconductor device release during pick and place operations, and  associated systems and methods	Hooper Andy E.
11233024	Methods for forming substrate terminal pads, related terminal pads and  substrates and assemblies incorporating such terminal pads	Jensen Travis M.
11233034	Stacked memory routing techniques	Keeth Brent
11233036	Interconnect structure with redundant electrical connectors and  associated systems and methods	Chandolu Anilkumar
11233059	Construction of integrated circuitry, DRAM circuitry, a method of forming  a conductive line construction, a method of forming memory circuitry, and a  method of forming DRAM circuitry	Sasaki Takashi
11233179	Wavelength converters, including polarization-enhanced carrier capture  converters, for solid state lighting devices, and associated systems and  methods	Schubert Martin F.; Odnoblyudov Vladimir
11233650	Verifying identity of a vehicle entering a trust zone	Mondello Antonino; Troia Alberto
11233681	Multi-level signaling in memory with wide system interface	Hollis Timothy M.; Balb Markus; Ebert Ralf
11237262	Systems and methods to use radar in RFID systems	Tuttle John R.
11237327	Method and structure providing optical isolation of a waveguide on a  silicon-on-insulator substrate	Meade Roy E.
11237579	Apparatuses and methods for ZQ calibration	He Yuan; Satoh Yasuo
11237612	Charge-sharing capacitive monitoring circuit in a multi-chip package to  control power	Parry Jonathan S.; Miller Stephen L.; Yu Liang
11237617	Arbitration techniques for managed memory	Palmer David Aaron
11237726	Memory system performance enhancements using measured signal and noise  characteristics of memory cells	Fitzpatrick James; Parthasarathy Sivagnanam; Khayat Patrick Robert;  Alhussien AbdelHakim S.; Moschiano Violante
11237731	Quality of service for memory devices using suspend and resume of program  and erase operations	Bert Luca
11237734	High throughput DRAM with distributed column access	He Yuan
11237737	SLC cache management	Tanpairoj Kulachet; Jean Sebastien Andre; Muchherla Kishore Kumar; Malshe  Ashutosh; Huang Jianmin
11237754	Management of erase suspend and resume operations in memory devices	Guda Chandra M.; Rajgopal Suresh
11237755	Data erasure in memory sub-systems	Brandt Kevin R; Van Eaton Thomas Cougar
11237808	Target architecture determination	Leidel John D.
11237841	Configurable media structure	Basu Reshmi; Murphy Richard C.
11237901	Error correction using hierarchical decoders	Amato Paolo; Sforzin Marco
11237906	Generating a balanced codeword protected by an error correction code	Laurent Christophe Vincent Antoine
11237953	Host device physical address encoding	Cariello Giuseppe
11237970	Reduce data traffic between cache and memory via data access of variable  sizes	Wallach Steven Jeffrey
11237995	Transaction identification	Ross Frank F.; Walker Robert M.
11238006	Methods and apparatuses for differential signal termination	Kuehlwein Jeremy; King Gregory; Stay Michael
11238098	Heterogenous key-value sets in tree database	Boles David; Groves John M.; Moyer Steven; Tomlinson Alexander
11238248	Systems and methods using single antenna for multiple resonant frequency  ranges	Tuttle John R.
11238903	Dynamic allocation of a capacitive component in a memory device	Badrieh Fuad; Kinsley Thomas H.; Choi Baekkyu
11238907	Techniques for precharging a memory cell	Bedeschi Ferdinando; Di Vincenzo Umberto
11238909	Apparatuses and methods for setting operational parameters of a memory  included in a memory module based on location information	Durai Elancheren; Holton Quincy R.
11238913	Cell-based reference voltage generation	Derner Scott James; Kawamura Christopher John
11238914	Apparatuses and methods for compute components formed over an array of  memory cells	Zawodny Jason T.
11238917	Mode-dependent heating of a memory device	Mayer Peter; Richter Michael Dieter; Brox Martin; Spirkl Wolfgang Anton;  Hein Thomas
11238920	Comparison operations in memory	Wheeler Kyle B.; Manning Troy A.; Murphy Richard C.
11238937	Apparatus for programming memory cells using multi-step programming  pulses	Lee Eric N.
11238939	Secure erase for data corruption	Luo Ting; Tanpairoj Kulachet; Singidi Harish Reddy; Huang Jianmin;  Thomson Preston Allen; Jean Sebastien Andre
11238940	Initialization techniques for memory devices	Pollio Antonino; Portacci Giuseppe Vito; Sali Mauro Luigi; Magnavacca  Alessandro
11238945	Techniques for programming self-selecting memory	Di Vincenzo Umberto
11238946	Apparatus and methods for seeding operations concurrently with data line  set operations	Xu Jun; Dong Yingda
11238949	Memory devices configured to test data path integrity	Grunzke Terry
11238950	Reliability health prediction by high-stress seasoning of memory devices	Xu Zhongguang; Lang Murong; Zhou Zhenming
11238953	Determine bit error count based on signal and noise characteristics  centered at an optimized read voltage	Khayat Patrick Robert; Parthasarathy Sivagnanam; Fitzpatrick James
11239095	Stacked semiconductor die assemblies with high efficiency thermal paths  and molded underfill	Hembree David R.; Stephenson William R.
11239117	Replacement gate dielectric in three-node access device formation for  vertical three dimensional (3D) memory	Saeedi Vahdat Armin; Smythe, III John A.; Lee Si-Woo; Sandhu Gurtej S.;  Sills Scott E.
11239128	Microelectronic devices, stacked microelectronic devices, and methods for  manufacturing microelectronic devices	Ye Seng Kim Dalson; Chong Chin Hui; Lee Choon Kuan; Lee Wang Lai; Said  Roslan Bin
11239129	Package cooling by coil cavity	Bayless Andrew M.; Huang Wayne H.; Fay Owen R.
11239133	Apparatus and method for dissipating heat in multiple semiconductor  device modules	Qu Xiaopeng; Arifeen Shams U.
11239169	Semiconductor memory stacks connected to processing units and associated  systems and methods	Kirby Kyle K.
11239181	Integrated assemblies	Kothari Rohit; Xu Lifang; Li Jian
11239200	Methods and systems for improving power delivery and signaling in stacked  semiconductor devices	Veches Anthony D.
11239206	Dual sided fan-out package having low warpage across all temperatures	Yoo Chan H.; Tuttle Mark E.
11239207	Semiconductor die stacks and associated systems and methods	Kirby Kyle K.
11239240	Methods of forming a semiconductor device	Simsek-Ege Arzum F.; Yang Guangjun; Wang Kuo-Chen; Akhtar Mohd Kamran;  Koge Katsumi
11239242	Integrated assemblies having dielectric regions along conductive  structures, and methods of forming integrated assemblies	Yang Guangjun; Akhtar Mohd Kamran; Borsari Silvia; Schrinsky Alex J.
11239248	Microelectronic devices including stair step structures, and related  electronic devices and methods	Xu Lifang; Hopkins John D.; Lindsay Roger W.; Luo Shuangqiang
11239252	Integrated structures including material containing silicon, nitrogen,  and at least one of carbon, oxygen, boron and phosphorus	Dorhout Justin B.; Wang Fei; Carter Chet E.; Laboriante Ian; Hopkins John  D.; Shrotri Kunal; Meyer Ryan; Shamanna Vinayak; Parekh Kunal R.; Roberts  Martin C.; Park Matthew
11239403	Light emitting diodes with enhanced thermal sinking and associated  methods of operation	Tetz Kevin; Watkins Charles M.
11240006	Secure communication for a key exchange	Mondello Antonino; Troia Alberto
11243513	Controlling transport of physical objects based on scanning of encoded  images	Principato Giuseppe
11243554	Temperature interpolation techniques for multiple integrated circuit  references	Chakraborty Anupriya; Porter John David; Wilson Alan John
11243596	Architecture-based power management for a memory device	Laurent Christophe Vincent Antoine; Martinelli Andrea; Mirichigni  Graziano
11243602	Low power state implementation in a power management circuit	Rowley Matthew David
11243699	System using a restricted operation mode memory indicator	Cariello Giuseppe; Parry Jonathan Scott
11243711	Controlling firmware storage density based on temperature detection	Sato Junichi
11243804	Time to live for memory access by processors	Eno Justin M.
11243831	Reset and replay of memory sub-system controller in a memory sub-system	Zhu Jiangli; Tai Ying Yu; Zhu Fangfang; Wang Wei
11243838	Methods and apparatuses for error correction	Varanasi Chandra C.
11243889	Cache architecture for comparing data on a single page	Walker Robert M.
11243896	Multiple pin configurations of memory devices	Sato Junichi
11244713	Variable page size architecture	Villa Corrado
11244715	Systems and methods for 1.5 bits per cell charge distribution	Vimercati Daniele
11244717	Write operation techniques for memory systems	Lu Zhongyuan; Papagianni Christina; Wang Hongmei; Gleixner Robert J.
11244725	Apparatuses and methods of forming apparatuses using a partial  deck-by-deck process flow	Goda Akira; Lindsay Roger W.
11244729	Search for an optimized read voltage	Khayat Patrick Robert; Fitzpatrick James; Alhussien AbdelHakim S.;  Parthasarathy Sivagnanam
11244733	Mitigating disturbances of memory cells	Vimercati Daniele; Fischer Mark; Johnson Adam D.
11244739	Counter-based read in memory device	Di Vincenzo Umberto; Muzzetto Riccardo; Bedeschi Ferdinando
11244740	Adapting an error recovery process in a memory sub-system	Xu Zhongguang; Lang Murong; Zhou Zhenming
11244741	Selectable fuse sets, and related methods, devices, and systems	Wieduwilt Christopher G.; Rehmeyer James S.; Eichmeyer Seth A.
11244855	Architecture of three-dimensional memory device and methods regarding the  same	Fratin Lorenzo; Varesi Enrico; Fantini Paolo
11244888	Memory core chip having TSVs	Nishioka Naohisa; Narui Seiji
11244903	Tungsten structures and methods of forming the structures	Greenlee Jordan D.; Emor Christian George; Rampton Travis; McTeer Everett  Allen; Klein Rita J.
11244942	Apparatus comprising antifuse cells	Ishii Toshinao; Tanuma Yasuhiko
11244951	Memory cells	Karda Kamal M.; Tao Qian; Ramaswamy Durai Vishak Nirmal; Liu Haitao;  Prall Kirk D.; Chavan Ashonita
11244952	Array of capacitors, array of memory cells, methods of forming an array  of capacitors, and methods of forming an array of memory cells	Chhajed Sameer; Chavan Ashonita A.; Fischer Mark; Ramaswamy Durai Vishak  Nirmal
11244954	Integrated assemblies having vertically-spaced channel material segments,  and methods of forming integrated assemblies	Surthi Shyam; Resnati Davide; Tessariol Paolo; Hill Richard J.; Hopkins  John D.
11244955	Memory arrays and methods used in forming a memory array comprising  strings of memory cells	Tessariol Paolo; Dorhout Justin B.; Li Jian; Meyer Ryan L.
11245398	Output buffer having supply filters	Vimercati Daniele
11245583	Determining whether a vehicle should be configured for a different region	Troia Alberto; Mondello Antonino
11245862	Anti-eclipse circuitry with tracking of floating diffusion reset level	Olsen Espen A.
11249531	Apparatuses and methods for exiting low power states in memory devices	Sundaram Rajesh; Low William; Jayachandran Sowmiya
11249679	Selecting a write operation mode from multiple write operation modes	Shen Zhenlei; Zhu Fangfang; Xie Tingjun; Zhu Jiangli
11249723	Posit tensor processing	Ramesh Vijay S.
11249830	Detecting page fault traffic	Porzio Luca; Orlando Alessandro; Caraccio Danilo; Izzi Roberto
11249847	Targeted command/address parity low lift	Boehm Aaron P.; Schaefer Scott E.
11249896	Logical-to-physical mapping of data groups with data locality	Subbarao Sanjay; Lam Johnny A.; Maroney John E.; Ish Mark
11249907	Write-back cache policy to limit data transfer time to a memory device	Brewer Tony M.
11249922	Namespace mapping structural adjustment in non-volatile memory devices	Frolikov Alex
11249924	Secure data communication with memory sub-system	Bavishi Dhawal
11250648	Predictive maintenance of automotive transmission	Kale Poorna; Bielby Robert Richard Noel
11250889	Providing power availability information to memory	Mirichigni Graziano; Villa Corrado
11250890	Memory with configurable die powerup delay	Hiscock Dale H.; Kaminski Michael; Alzheimer Joshua E.; Gentry John H.
11250891	Validation of DRAM content using internal data signature	Golov Gil
11250900	Half density ferroelectric memory and operation	Derner Scott J.; Ingalls Charles L.
11250903	Apparatus for supplying power supply voltage to semiconductor chip  including volatile memory cell	He Yuan; Kondo Chikara; Toyama Daigo
11250918	Preemptive idle time read scans	Malshe Ashutosh; Singidi Harish Reddy; Muchherla Kishore Kumar; Miller  Michael G.; Ratnam Sampath; Zhang Xu; Zhou Jie
11250928	Test access port architecture to facilitate multiple testing modes	Spica Michael Richard
11251096	Wafer registration and overlay measurement systems and related methods	Mirin Nikolay A.; Dembi Robert; Housley Richard T.; Zhang Xiaosong; Harms  Jonathan D.; Kramer Stephen J.
11251148	Semiconductor devices including array power pads, and associated  semiconductor device packages and systems	Kimoto Hisamitsu
11251190	Memory arrays comprising strings of memory cells and methods used in  forming a memory array comprising strings of memory cells	Hopkins John D.; Lomeli Nancy M.
11251261	Forming a barrier material on an electrode	Kelkar Sanket S; Cheng An-Jen B.; Kim Dojun; Petz Christopher W.;  Rocklein Matthew N.; Kraus Brenda D.
11251363	Methods of forming electronic devices	Sandhu Gurtej S.; Pandey Sumeet C.
11251369	Semiconductor constructions	Hopkins John D.
11251516	Semiconductor device with tunable antenna using wire bonds	Luo Shijian; Fay Owen R.
11251796	Phase lock circuitry using frequency detection	Takai Yasuhiro; Kuzmenka Maksim; Balakrishnan Mani; Brox Martin
11252223	Adaptive communication interface	Hoffman Jeffrey D.; Bjerke Allan R
11255902	Apparatuses for selective TSV block testing	Ide Akira
11256310	Configuration update for a memory device based on a temperature of the  memory device	Fackenthal Richard E.
11256418	Logical address history management in memory device	Reche Cory J; Lee Phil W.
11256427	Unauthorized memory access mitigation	Murphy Richard C.; Swami Shivam; Malihi Naveh; Korzh Anton; Hush Glen E.
11256429	Adjustment of a pre-read operation based on an operating temperature	Shen Zhenlei E.; Chen Zhengang; Xie Tingjun; Zhu Jiangli
11256437	Data migration for memory operation	Walker Robert M.; Rosenfeld Paul; La Fratta Patrick A.
11256443	Resource allocation in memory systems based on operation modes	Frolikov Alex
11256565	Transaction metadata	Mirichigni Graziano; Sforzin Marco; Amato Paolo; Caraccio Danilo
11256566	Enhanced bit flipping scheme	Fackenthal Richard E.
11256570	Progressive length error control code	Pawlowski J. Thomas
11256616	Power loss data protection in a memory sub-system	Xu Peng; Wu Jiangang; Li Yun
11256617	Metadata aware copyback for memory devices	Chen Zhengang; Huang Jianmin
11256620	Cache management based on memory device over-provisioning	Brandt Kevin R.; Feeley Peter; Muchherla Kishore Kumar; Li Yun; Ratnam  Sampath K.; Malshe Ashutosh; Hale Christopher S.; Hubbard Daniel J.
11256624	Intelligent content migration with borrowed memory	Curewitz Kenneth Marion; Akel Ameen D.; Bradshaw Samuel E.; Eilert Sean  Stephen; Yudanov Dmitri
11256636	Configurable termination circuitry	Wimmer Robert; Loftsgaarden Taylor; Hsieh Ming-ta
11256778	Methods and apparatus for checking the results of characterized memory  searches	Harms Jonathan D.
11257529	Apparatuses and methods for DRAM wordline control with reverse  temperature coefficient delay	Joo Yangsung; Noguchi Hidekazu
11257532	Apparatuses and methods for controlling word line discharge	Suzuki Takamasa
11257535	Apparatuses and methods for managing row access counts	Shore Michael A.; Li Jiyun
11257538	Systems and methods for improved reliability of components in dynamic  random access memory (DRAM)	Kim Tae H.
11257546	Reading of soft bits and hard bits from memory cells	Fitzpatrick James; Parthasarathy Sivagnanam; Khayat Patrick Robert;  Alhussien AbdelHakim S.
11257549	Sequential voltage control for a memory device	Nam Ki-Jun; Suzuki Takamasa; Ma Yantao; Matsubara Yasushi
11257558	Overvoltage protection for circuits of memory devices	Chu Wei Lu; Pan Dong
11257564	Defect detection for a memory device	Lu Chun Yi
11257565	Management of test resources to perform testing of memory components  under different temperature conditions	Thiruvengadam Aswin; Parthasarathy Sivagnanam; Scobee Daniel; Jensen  Frederick
11257566	Apparatuses and methods for fuse latch redundancy	Montierth Dennis G.
11257744	Method of forming vias using silicon on insulator substrate	Maenosono Toshiyuki; Kikuchi Yuta; Ito Manabu; Saeki Yoshihiro
11257766	Methods of forming microelectronic devices, and related microelectronic  devices, memory devices, and electronic systems	Benson Russell A.; Colombo Davide; Li Yan; McDaniel Terrence B.; Nair  Vinay; Borsari Silvia
11257792	Semiconductor device assemblies with annular interposers	Kinsley Thomas H.
11257821	Digit line and body contact for semiconductor devices	Lee Si-Woo
11257834	Microelectronic devices including corrosion containment features, and  related electronic systems and methods	Luo Shuangqiang; Chary Indra V.
11257838	Thickened sidewall dielectric for memory cell	Weimer Ronald A.; Min Kyu S.; Graettinger Thomas M.; Ramaswamy Durai  Vishak Nirmal
11257839	Memory arrays comprising strings of memory cells and methods used in  forming a memory array comprising strings of memory cells	Hopkins John D.
11257962	Transistors comprising an electrolyte, semiconductor devices, electronic  systems, and related methods	Gao Yunfei; Karda Kamal M.; Kramer Stephen J.; Sandhu Gurtej S.; Pandey  Sumeet C.; Liu Haitao
11258473	Self interference noise cancellation to support multiple frequency bands  with neural networks or recurrent neural networks	Luo Fa-Long
11258600	Secure communication in accessing a network	Mondello Antonino; Troia Alberto
11262780	Back-bias optimization	Brox Martin; Sugimoto Satoru; Cabrera Bernal Elena; Pottgiesser Jan;  Piatkowski Sven
11262783	Systems and methods for initializing bandgap circuits	Chu Wei Lu
11262937	Balancing data for storage in a memory device	Laurent Christophe Vincent Antoine; Martinelli Andrea; Sforzin Marco;  Amato Paolo
11262941	Apparatuses and methods including memory commands for semiconductor  memories	Kim Kang-Yong; Lee Hyun Yoo; Porter John D.
11262946	Cache-based memory read commands	Bavishi Dhawal; La Fratta Patrick A.
11262951	Memory characteristic based access commands	Sun Honglin
11263010	Bit string lookup data structure	Ramesh Vijay S.
11263078	Apparatuses, systems, and methods for error correction	Fujiwara Yoshinori; Kotti Vivek; Wieduwilt Christopher G.; Johnson Jason  M.; Werhane Kevin G.
11263123	Apparatuses and methods for memory device as a store for program  instructions	Zawodny Jason T.; Wheeler Kyle B.; Murphy Richard C.
11263124	Host-resident translation layer validity check	Palmer David Aaron
11263134	Block family combination and voltage bin selection	Sheperek Michael; Koudele Larry J.; Kaynak Mustafa N.; Nowell Shane
11263142	Servicing memory high priority read requests	Fisher Ryan G.
11263154	Block or page lock features in serial interface memory	Pekny Theodore T.
11263156	Memory component with a virtualized bus and internal logic to perform a  machine learning operation	Kale Poorna; Gattani Amit
11263308	Run-time code execution validation	Mondello Antonino; Troia Alberto
11264068	Apparatuses and methods for semiconductor devices including clock signal  lines	Yatsushiro Ryosuke; Narui Seiji
11264069	Apparatus with a calibration mechanism	Johnson Jason M.; Choi Jung-Hwa
11264074	Time-based access of a memory cell	Di Vincenzo Umberto
11264078	Metastable resistant latch	Penney Daniel B.; Waldrop William C.
11264079	Apparatuses and methods for row hammer based cache lockdown	Roberts David A.
11264096	Apparatuses, systems, and methods for a content addressable memory cell  with latch and comparator circuits	Schreck John; Penney Dan
11264099	Apparatuses and methods for automated dynamic word line start voltage	Srinivasan Dheeraj; Tsai Jeffrey M.; Mohammadzadeh Ali; Grunzke Terry M.
11264112	Trim setting determination for a memory device	Thiruvengadam Aswin; Lowrance Daniel L.; Feeley Peter
11264116	Memory sub-system with background scan and histogram statistics	Cadloni Gerald L.; Liikanen Bruce A.
11264275	Integrated assemblies and methods of forming integrated assemblies	Hopkins John D.; Xu Lifang; Lomeli Nancy M.
11264320	Integrated assemblies	Eppich Anton P.
11264332	Interposers for microelectronic devices	Fay Owen; Yoo Chan H.
11264349	Semiconductor die with capillary flow structures for direct chip  attachment	Lee Jungbae
11264360	Signal delivery in stacked device	Keeth Brent; Hiatt Mark; Lee Terry R.; Tuttle Mark; Advani Rahul; Schreck  John F.
11264377	Devices including control logic structures, and related methods	Beigel Kurt D.; Sills Scott E.
11264388	Microelectronic devices including decoupling capacitors, and related  apparatuses, electronic systems, and methods	Wang Chao Wen
11264394	Integrated components which have both horizontally-oriented transistors  and vertically-oriented transistors	Derner Scott J.; Ingalls Charles L.
11264395	Vertical transistor, integrated circuitry, method of forming a vertical  transistor, and method of forming integrated circuitry	Liu Hung-Wei; Antonov Vassil N.; Chavan Ashonita A.; Fan Darwin Franseda;  Hull Jeffery B.; Khandekar Anish A.; Laskar Masihhur R.; Liao Albert; Lin  Xue-Feng; Nahar Manuj; Vasilyeva Irina V.
11264404	Microelectronic devices including a varying tier pitch, and related  electronic systems and methods	Liu Yifen; Ghilardi Tecla; Matamis George; Shepherdson Justin D.; Lomeli  Nancy M.; Carter Chet E.; Byers Erik R.
11264472	Memory configurations	Bhattacharyya Arup
11264568	Textured memory cell structures	Redaelli Andrea; Boniardi Mattia; Varesi Enrico; Calarco Raffaella;  Boschker Jos E.
11269397	Power configuration component including selectable configuration profiles  corresponding to operating power characteristics of the power configuration  component	Rowley Matthew D.; Hieb Adam J.
11269515	Secure authentication for debugging data transferred over a system  management bus	Mendes Joe; Guda Chandra M.; Gaskill Steven
11269545	NAND logical-to-physical table region tracking	Yuen Eric Kwok Fung; Ferrari Giuseppe; Iaculo Massimo; Drissi Lalla  Fatima; Duan Xinghui; D'Eliseo Giuseppe
11269552	Multi-pass data programming in a memory sub-system having multiple dies  and planes	Subbarao Sanjay; Williams Steven S.; Ish Mark; Maroney John Edward
11269553	Adjusting scan event thresholds to mitigate memory errors	Alsasua Gianni Stephen; Singidi Harish Reddy; Feeley Peter Sean; Malshe  Ashutosh; Padilla, Jr. Renato; Muchherla Kishore Kumar; Ratnam Sampath
11269648	Apparatuses and methods for ordering bits in a memory device	Hush Glen E.; Boehm Aaron P.; Luo Fa-Long
11269661	Providing, in a configuration packet, data indicative of data flows in a  processor with a data flow manager	Chritz Jeremy; Schmitz Tamara; Luo Fa-Long; Hulton David
11269707	Real-time trigger to dump an error log	Liang Qing; Parry Jonathan Scott
11269708	Real-time trigger to dump an error log	Sassara Alberto; Francesco Basso; Attanasio Crescenzo; Iaculo Massimo
11269778	Mapping supporting non-sequential writes at sequentially-written memory  devices	Kanteti Kumar VKH
11269780	Mapping non-typed memory access to typed memory access	Curewitz Kenneth Marion; Eilert Sean S.; Wang Hongyu; Bradshaw Samuel E.;  Gunasekaran Shivasankar; Eno Justin M.; Swami Shivam
11270740	Sense amplifier schemes for accessing memory cells	Nagata Kyoichi
11270746	Word line driver circuitry, and associated methods, devices, and systems	Kim Tae H.
11270750	Semiconductor device performing row hammer refresh operation	Ishikawa Toru; Nakanishi Takuya; Bessho Shinji
11270754	Apparatuses and methods for dynamic voltage and frequency switching for  dynamic random access memory	Gans Dean
11270756	Row hammer mitigation	Hush Glen E.; Murphy Richard C.; Sun Honglin
11270757	Semiconductor device with word line degradation monitor and associated  methods and systems	Ghosh Gitanjali T.; Bell Debra M.; Subramaniam Arunmozhi R.; Baghi Roya;  Umesh Deepika Thumsi; Ng Sue-Fern
11270758	Apparatuses, systems, and methods for system on chip replacement mode	Kitagawa Katsuhiro; Morishita Yoshihito; Toyama Daigo; Suzuki Takamasa
11270772	Voltage offset bin selection by die group for memory devices	Rayaprolu Vamsi Pavan; Kaynak Mustafa N.; Sheperek Michael; Koudele Larry  J.; Nowell Shane
11270774	Apparatus for calibrating sensing of memory cell data states	Valeri Gianfranco; Moschiano Violante; Di-Francesco Walter
11270909	Apparatus with species on or in conductive material on elongate lines	Sandhu Gurtej S.; Milojevic Marko; Smythe John A.; Quick Timothy A.;  Pandey Sumeet C.
11270924	Heat spreaders for multiple semiconductor device modules	Qu Xiaopeng
11270985	Solid state lighting device with different illumination parameters at  different regions of an emitter array	Xin Zhang
11271002	Methods used in forming a memory array comprising strings of memory cells	Barclay M. Jared; Carlson Merri L.; Keshav Saurabh; Matamis George; Moon  Young Joon; Parekh Kunal R.; Tessariol Paolo; Shamanna Vinayak
11271006	Methods of forming charge-blocking material, and integrated assemblies  having charge-blocking material	Cheung Pei Qiong; Xu Zhixin; Fang Yuan
11271153	Self-selecting memory cell with dielectric barrier	Fratin Lorenzo; Pellizzer Fabio
11271720	Validating data stored in memory using cryptographic hashes	Troia Alberto; Mondello Antonino
11271721	Distributed secure array using intra-dice communications to perform data  attestation	Troia Alberto; Mondello Antonino
11271731	Single-use password generation	Ruane James; Strong Robert W.
11271735	Apparatuses, systems, and methods for updating hash keys in a memory	Ayyapureddi Sujeet
11271755	Verifying vehicular identity	Mondello Antonino; Troia Alberto
11274977	Semiconductor device including sensor	Furutani Kiyohiro
11275111	Plurality of edge through-silicon vias and related systems, methods, and  devices	Nishioka Naohisa
11275508	Host controlled enablement of automatic background operations in a memory  device	Falanga Francesco; Caraccio Danilo
11275512	Asynchronous power loss impacted data structure	Luo Xiangang; Luo Ting; Huang Jianmin
11275515	Descrambling of scrambled linear codewords using non-linear scramblers	Khayat Patrick Robert; Parthasarathy Sivagnanam; Kaynak Mustafa N.
11275520	Media type selection using a processor in memory	Christensen Carla L.; Hosseinimakarem Zahra; Chhabra Bhumika
11275521	Image data based media type selection based on a first identified  attribute of the initial image data	Christensen Carla L.; Hosseinimakarem Zahra; Chhabra Bhumika
11275523	Per cursor logical unit number sequencing	Boals Daniel A.; Schuh Karl D.; Harris Byron D.
11275562	Bit string accumulation	Ramesh Vijay S.; Park Katie Blomster
11275581	Expended memory component	Ramesh Vijay S.
11275587	Static identifications in object-based memory access	Wallach Steven Jeffrey
11275650	Systems and methods for performing a write pattern in memory devices	Howe Gary L.
11275679	Separate cores for media management of a memory sub-system	Bianco Antonio David; Traver John Paul
11275680	Profile and queue-based wear leveling of memory devices	Basu Reshmi; Maes, II Richard Donald; Park Katie Blomster; Pintar Robert  J.; Johnson Gary A.
11275687	Memory cache management based on storage capacity for parallel  independent threads	Bert Luca
11275696	Isolated performance domains in a memory system	Ray Anirban; Maharana Parag R.
11275710	Loop thread order execution control of a multi-threaded, self-scheduling  reconfigurable computing fabric	Brewer Tony M.
11276340	Intelligent adjustment of screen refresh rate	Ranjan Ashish; Wantulok Carly M.; Trivedi Prateek; Christensen Carla L.;  Huang Jun; Trivedi Avani F.
11276437	Interconnections for 3D memory	Tanzawa Toru
11276439	Apparatuses and methods for performing logical operations using sensing  circuitry	Manning Troy A.
11276442	Apparatuses and methods for clock leveling in semiconductor memories	Ito Koji; Tada Keisuke; Sakashita Mototada
11276443	Offset cancellation	Brox Martin; Spirkl Wolfgang Anton; Hein Thomas; Richter Michael Dieter;  Mayer Peter
11276448	Memory array with multiplexed select lines and two transistor memory  cells	Vimercati Daniele
11276449	Memory arrays, ferroelectric transistors, and methods of reading and  writing relative to memory cells of memory arrays	Ramaswamy Durai Vishak Nirmal; Kinney Wayne
11276450	Refresh circuitry	Hedden Richard N.
11276454	Memory with partial array refresh	Hiscock Dale H.; Bell Debra M.; Kaminski Michael; Alzheimer Joshua E.;  Veches Anthony D.; Rehmeyer James S.
11276455	Systems and methods for memory device power off	Suzuki Takamasa; Matsubara Yasushi; Porter John D.; Nam Ki-Jun
11276456	Systems and methods for capture and replacement of hammered word line  address	Lee Joo-Sang; Riley John E.
11276457	Processing in memory	Lea Perry V.; Finkbeiner Timothy P.
11276461	Programming multi-level memory cells	Cariello Giuseppe; Oh Jonathan W.; Rori Fulvio
11276463	Matching patterns in memory arrays	Yudanov Dmitri
11276468	High-speed efficient level shifter	Ayyapureddi Sujeet
11276470	Bitline driver isolation from page buffer circuitry in memory device	Moschiano Violante; Srinivasan Dheeraj; D'Alessandro Andrea
11276473	Coarse calibration based on signal and noise characteristics of memory  cells collected in prior calibration operations	Khayat Patrick Robert; Fitzpatrick James; Alhussien AbdelHakim S.;  Parthasarathy Sivagnanam
11276476	Common-mode comparison based fuse-readout circuit	Pan Dong
11276613	Methods of forming semiconductor structures comprising thin film  transistors including oxide semiconductors	Torek Kevin J.
11276658	Devices with three-dimensional structures and support elements to  increase adhesion to substrates	Gambee Christopher J.; Doan Nhi; Tiwari Chandra S.; Fay Owen R.; Chen  Ying
11276659	Methods for forming elements for microelectronic components, related  conductive elements, and microelectronic components, assemblies and  electronic systems incorporating such conductive elements	Arifeen Shams U.; Glancey Christopher; Sinha Koustav
11276679	Semiconductor device and method of forming the same	Sakogawa Yasuyuki
11276701	Memory arrays comprising strings of memory cells and methods used in  forming a memory array comprising strings of memory cells	Howder Collin; Carter Chet E.
11276731	Access line formation for a memory array	Redaelli Andrea; Conti Anna Maria
11276733	Arrays of memory cells and methods of forming an array of vertically  stacked tiers of memory cells	Liu Zengtao T.
11277149	Bit string compression	Ramesh Vijay S.
11281392	Garbage collection in a memory component using an adjusted parameter	Huang Jianmin; Limaye Aparna U.; Trivedi Avani F.; Iwasaki Tomoko Ogura;  Evans Tracy D.
11281400	Temperature-based storage system organization	Cariello Giuseppe
11281401	Controlled heating of a memory device	Mayer Peter; Richter Michael Dieter; Brox Martin; Spirkl Wolfgang Anton;  Hein Thomas
11281501	Determination of workload distribution across processors in a memory  system	Frolikov Alex
11281529	Error detection code generation techniques	Jovanovic Natalija; Dietrich Stefan
11281533	Hybrid iterative error correcting and redundancy decoding operations for  memory sub-systems	Tai Ying Yu; Zhu Jiangli; Chen Zhengang
11281578	Garbage collection in a memory sub-system during a low battery state	Limaye Aparna U.; Evans Tracy D.; Iwasaki Tomoko Ogura; Trivedi Avani F.;  Huang Jianmin
11281585	Forward caching memory systems and methods	Trout Harold Robert George
11281589	Asynchronous forward caching memory systems and methods	Trout Harold Robert George
11281604	Multiple memory type shared memory bus systems and methods	Roberts David Andrew; Pawlowski Joseph Thomas; Cooper-Balis Elliott
11281608	Translation system for finer grain memory architectures	Keeth Brent; Murphy Richard C.; Cooper-Balis Elliott C.
11282548	Integrated assemblies and methods forming integrated assemblies	Lee Che-Chi; McDaniel Terrence B.; Zhang Kehao; Chan Albert P.; Jacob  Clement; Fumagalli Luca; Nair Vinay
11282553	Data strobe calibration	Giaccio Claudio; Pascale Ferdinando; Di Martino Erminio; Mastrangelo  Raffaele; D'Alessandro Ferdinando; Castaldo Andrea; Castellano Cristiano
11282556	Apparatuses and methods involving accessing distributed sub-blocks of  memory cells	Tanzawa Toru
11282557	Magnetic cache for a memory device	Yudanov Dmitri A.
11282560	Temperature-based access timing for a memory device	Wong Victor; Kim Sihong; Akamatsu Hiroshi; Vimercati Daniele; Porter John  D.
11282562	Refresh-related activation improvements	Kaminski Stephen Michael; Veches Anthony D.; Rehmeyer James S.; Bell  Debra M.; Hiscock Dale Herber; Alzheimer Joshua E.
11282563	Apparatuses and methods for operations in a self-refresh state	Lea Perry V.; Hush Glen E.
11282564	Selective wordline scans based on a data state metric	Rayaprolu Vamsi Pavan; Muchherla Kishore Kumar; Singidi Harish R.; Malshe  Ashutosh; Alsasua Gianni S.
11282566	Apparatuses and methods for delay control	Satoh Yasuo
11282567	Sequential SLC read optimization	Iwasaki Tomoko Ogura; Evans Tracy D.; Trivedi Avani F.; Limaye Aparna U.;  Huang Jianmin
11282569	Apparatus with latch balancing mechanism and methods for operating the  same	He Yuan; Akamatsu Hiroshi
11282571	Auto-referenced memory cell read techniques	Mirichigni Graziano; Sforzin Marco; Orlando Alessandro
11282574	Auto-referenced memory cell read techniques	Mirichigni Graziano; Amato Paolo; Pio Federico; Orlando Alessandro;  Sforzin Marco
11282577	Detecting failure of a thermal sensor in a memory device	Bueb Christopher J.; Ramamoorthy Aravind
11282582	Short program verify recovery with reduced programming disturbance in a  memory sub-system	Chen Hong-Yan; Dong Yingda
11282741	Methods of forming a semiconductor device using block copolymer materials	Millward Dan B.; Quick Timothy A.
11282746	Method of manufacturing microelectronic devices, related tools and  apparatus	Upadhyayula Suresh K.; Lim Thiam Chye
11282747	Methods of forming microelectronic devices, and related microelectronic  devices, and electronic systems	Zhao Bo; Lomeli Nancy M.; Xu Lifang; Olson Adam L.
11282811	Integrated circuit wire bonded to a multi-layer substrate having an open  area that exposes wire bond pads at a surface of the inner layer	Boo Kelvin Tan Aik; Chong Chin Hui; Ye Seng Kim; Ng Hong Wan; Takiar Hem  P.
11282814	Semiconductor device assemblies including stacked individual modules	Thurgood Blaine J.
11282815	Methods of forming microelectronic devices, and related microelectronic  devices and electronic systems	Parekh Kunal R.; Tessariol Paolo; Goda Akira
11282845	Semiconductor devices comprising carbon-doped silicon nitride and related  methods	Fang Jun; Wang Fei; Rathod Saniya; Narulkar Rutuparna; Park Matthew; King  Matthew J.
11282847	Methods used in forming a memory array comprising strings of memory cells	Hopkins John D.; Scarbrough Alyssa N.
11282894	Cross-point memory with self-defined memory elements	Liu Jun
11282895	Split pillar architectures for memory devices	Fantini Paolo; Pellizzer Fabio; Fratin Lorenzo
11284394	Wireless devices and systems including examples of configuration modes  for baseband units and remote radio heads	Luo Fa-Long; Cummins Jaime; Schmitz Tamara; Chritz Jeremy
11285918	Secure access to vehicle using biometric identifier	Chhabra Bhumika; Wale Madison E.; Delaney Claudia A.; de la Garza  Villarreal Elsie
11287986	Reset interception to avoid data loss in storage device resets	Palmer David Aaron
11287987	Coherency locking schemes	Li Yun; Traver John
11287990	Solid state storage device with quick boot from NAND media	Liang Qing; He Deping
11287998	Read count scaling factor for data integrity scan	Muchherla Kishore Kumar; Malshe Ashutosh; Rayaprolu Vamsi Pavan; Singidi  Harish R.; Alsasua Gianni S.
11288009	Read sample offset bit determination using most probably decoder logic in  a memory sub-system	Sheperek Michael; Liikanen Bruce A.
11288013	Hardware based status collector acceleration engine for memory sub-system  operations	Zhu Fangfang; Zhu Jiangli; Tai Ying Yu; Wang Wei
11288016	Managed NAND data compression	Jean Sebastien Andre
11288074	Loop execution control for a multi-threaded, self-scheduling  reconfigurable computing fabric using a reenter queue	Brewer Tony M.
11288116	End of service life of data storage devices	Frolikov Alex
11288118	Erroneous bit discovery in memory system	Pawlowski Joseph Thomas
11288149	Flash memory block retirement policy	Singidi Harish Reddy; Cariello Giuseppe; He Deping; Stoller Scott  Anthony; Batutis Devin; Thomson Preston Allen
11288160	Threshold voltage distribution adjustment for buffer	McNeil, Jr. Jeffrey S.; Righetti Niccolo′; Muchherla Kishore  K.; Goda Akira; Marquart Todd A.; Helm Mark A.; Golov Gil; Binfet Jeremy;  Miccoli Carmine; Puzzilli Giuseppina
11288180	Management of storage resources allocated from non-volatile memory  devices to users	Frolikov Alex
11288198	Effective avoidance of line cache misses	Wei Meng; Zhang Shi Bo; Xiong Tao
11288199	Separate read-only cache and write-read cache in a memory sub-system	Bavishi Dhawal
11288214	Command selection policy	La Fratta Patrick A.; Walker Robert M.
11289135	Precharge timing control	Nakazawa Shigeyuki
11289137	Multi-port storage-class memory interface	Pawlowski Joseph Thomas
11289146	Word line timing management	Di Vincenzo Umberto; Bedeschi Ferdinando; Muzzetto Riccardo
11289147	Sensing techniques for a memory cell	Di Vincenzo Umberto; Bolandrina Efrem; Muzzetto Riccardo; Bedeschi  Ferdinando
11289151	Cross-coupled transistor threshold voltage mismatch compensation and  related devices, systems, and methods	Nagata Kyoichi
11289163	Multi-decks memory device including inter-deck switches	Li Benben; Goda Akira; Abdelrahaman Ramey M.; Laboriante Ian C.; Parat  Krishna K.
11289166	Acceleration of data queries in memory	Helm Mark A.; Pawlowski Joseph T.
11289360	Methods and apparatus for protection of dielectric films during  microelectronic component processing	Bayless Andrew M.; Wirz Brandon P.; Zhou Wei
11289440	Combination-bonded die pair packaging and associated systems and methods	Kirby Kyle K.; Street Bret K.
11289487	Doped titanium nitride materials for DRAM capacitors, and related  semiconductor devices, systems, and methods	Rocklein Matthew N.; Paduano Paul A.; Kelkar Sanket S.; Petz Christopher  W.; Song Zhe; Antonov Vassil; Tao Qian
11289491	Epitaxtal single crystalline silicon growth for a horizontal access  device	Saeedi Vahdat Armin; Sandhu Gurtej S.; Sills Scott E.; Lee Si-Woo;  Smythe, III John A.
11289501	Integrated assemblies having vertically-extending channel material with  alternating regions of different dopant distributions, and methods of forming  integrated assemblies	Surthi Shyam; Kim Byeung Chul; Hill Richard J.; Fabreguette Francois H.;  Sandhu Gurtej S.
11289611	Three dimensional memory	Lu Zhenyu; Zhu Hongbin; Haller Gordon A.; Lindsay Roger W.; Bicksler  Andrew; Cleereman Brian J.; Lee Minsoo
11290103	Charge transfer between gate terminals of subthreshold current reduction  circuit transistors and related apparatuses and methods	Akamatsu Hiroshi; He Yuan; Ishikawa Toru
11293962	Capacitive voltage divider for monitoring multiple memory components	Rowley Matthew D.
11294265	Control of display device for autonomous vehicle	Sato Junichi
11294574	Recycled version number values in flash memory	Wong Wanmo
11294582	Customer-specific activation of functionality in a semiconductor device	Dover Lance W.
11294585	Sequential data optimized sub-regions in storage devices	Palmer David Aaron; Manion Sean L.; Parry Jonathan Scott; Hanna Stephen;  Liang Qing; Grosz Nadav; Gyllenskog Christian M.; Tanpairoj Kulachet
11294738	Efficient operations of components in a wireless communications device	Hong Danfeng; Guterman Jose; Hills Chris
11294750	Media management logger for a memory sub-system	Zhu Fangfang; Tai Ying Yu; Zhu Jiangli; Wang Wei
11294762	Error correction in row hammer mitigation and target row refresh	Rooney Randall J.; Prather Matthew A.
11294766	Coordinated error correction	Schaefer Scott E.; Boehm Aaron P.
11294767	Deferred error-correction parity calculations	Palmer David Aaron
11294808	Adaptive cache	Roberts David Andrew; Pawlowski Joseph Thomas
11294820	Management of programming mode transitions to accommodate a constant size  of data transfer between a host system and a memory sub-system	Subbarao Sanjay; Fitzpatrick James
11294836	Methods for performing multiple memory operations in response to a single  command and memory devices and systems employing the same	Prather Matthew A.; Ross Frank F.; Rooney Randall J.
11294838	Signaling mechanism for bus inversion	Hanna Stephen D.; Parry Jonathan S.
11294848	Initialization sequencing of chiplet I/O channels within a chiplet system	Walker Dean E.; Brewer Tony
11295209	Analysis of memory sub-systems based on threshold distributions	Thiruvengadam Aswin; Lowrance Daniel L.; Phelps Joshua; Harrington Peter  B.
11295793	System-level timing budget improvements	Kim Kang-Yong
11295797	Techniques to mitigate asymmetric long delay stress	Visconti Angelo
11295800	Methods for adjusting row hammer refresh rates and related memory devices  and systems	Lee Joo-Sang
11295806	Large file integrity techniques	Palmer David Aaron
11295807	Volatile memory device with 3-D structure including memory cells having  transistors vertically stacked one over another	Koya Yoshihito
11295809	Programming memory cells where higher levels are programmed prior to  lower levels	Lee Changhyun; Goda Akira; Filipiak William C.
11295811	Increase of a sense current in memory	Lu Zhongyuan; Gleixner Robert J.; Sarpatwari Karthik
11295812	Memory devices and memory operational methods	Otsuka Wataru; Kunihiro Takafumi; Tsushima Tomohito; Kitagawa Makoto;  Sumino Jun
11295814	Architecture for fast content addressable memory search	Ogura Iwasaki Tomoko; Advani Manik
11295820	Regulation of voltage generation systems	Tripathi Manan; Piccardi Michele; Guo Xiaojiang
11295822	Multi-state programming of memory cells	Sarpatwari Karthik; Gajera Nevil N.
11295832	Plate defect mitigation techniques	Lovett Simon J.; Fackenthal Richard E.
11296047	Wiring with external terminal	Ota Ken
11296094	Memory device having shared access line for 2-transistor vertical memory  cell	Karda Kamal M.; Sarpatwari Karthik; Ramaswamy Durai Vishak Nirmal; Liu  Haitao
11296097	3D vertical NAND memory device including multiple select lines and  control lines having different vertical spacing	Sakui Koji
11296103	Integrated assemblies and methods of forming integrated assemblies	Surthi Shyam; Shrotri Kunal; Thorum Matthew
11296693	Apparatuses and methods for compensating for crosstalk noise at input  receiver circuits	Sreeramaneni Raghukiran; Penney Daniel B.
11296729	Data reliability for extreme temperature usage conditions in data storage	Kale Poorna; Bueb Christopher Joseph
11296872	Delegation of cryptographic key to a memory sub-system	Ruane James; Strong Robert W.
11296995	Reduced sized encoding of packet length field	Brewer Tony
11297042	Secure message including a vehicle private key	Troia Alberto; Mondello Antonino
11301132	Scheduling media management operations based on provided host system  usage requirements	Kale Poorna; Sahoo Ashok
11301143	Selective accelerated sampling of failure-sensitive memory pages	Muchherla Kishore Kumar; Besinga Gary F.; Steinmetz Cory M.; Seetamraju  Pushpa; Wu Jiangang; Ratnam Sampath K.; Feeley Peter
11301146	Storing page write attributes	Rayaprolu Vamsi Pavan; Ratnam Sampath K.; Muchherla Kishore Kumar;  Singidi Harish R.; Malshe Ashutosh; Alsasua Gianni S.
11301260	Configurable option ROM	Duncan Kevin R.
11301320	Erasure decoding for a memory device	Fackenthal Richard E.; Visconti Angelo
11301346	Separate trims for buffer and snapshot	Marquart Todd A.; Righetti Niccolo′; McNeil, Jr. Jeffrey S.;  Goda Akira; Muchherla Kishore K.; Helm Mark A.; Golov Gil; Binfet Jeremy;  Miccoli Carmine; Puzzilli Giuseppina
11301372	Host side memory address management	Huo Binbin
11301380	Sector-based tracking for a page cache	Walker Robert M.; Narsale Ashay
11301381	Power loss protection in memory sub-systems	Kowles Andrew M.
11301382	Write data for bin resynchronization after power loss	Sheperek Michael; Liikanen Bruce A.; Kientz Steven Michael
11301383	Managing processing of memory commands in a memory subsystem with a high  latency backing store	La Fratta Patrick A.; Dirik Cagdas; Isenegger Laurent; Walker Robert M.
11301390	Elastic buffer in a memory sub-system for debugging information	Mendes Joe; Guda Chandra; Gaskill Steven
11301391	Access unit and management segment memory operations	McGlaughlin Edward C.; Lucas Gary J.; Jeddeloh Joseph M.
11301401	Ball grid array storage for a memory sub-system	Rajgopal Suresh; Fleischer Balint
11301403	Command bus in memory	Ross Frank F.; Prather Matthew A.
11302374	Apparatuses and methods for dynamic refresh allocation	Jenkinson Matthew D.; Meier Nathaniel J.; Montierth Dennis G.
11302375	Performing an on demand refresh operation of a memory sub-system	Brady Michael T.
11302376	Systems and methods for memory refresh	Lee Joo-Sang; Brown David R.
11302377	Apparatuses and methods for dynamic targeted refresh steals	Li Liang; Zhang Yu; He Yuan
11302381	Sub word line driver	Kim Tae H.; Van Leeuwen Brenton P.
11302382	Apparatuses and methods for controlling driving signals in semiconductor  devices	Suzuki Takamasa; Yamamoto Nobuo
11302386	Distributed bias generation for an input buffer	Wu Xinyu; Pan Dong
11302387	Input/output capacitance measurement, and related methods, devices, and  systems	Lee Hyunui
11302390	Reading a multi-level memory cell	Robustelli Mattia; Pellizzer Fabio; Tortorelli Innocenzo; Pirovano  Agostino
11302391	System and method for reading memory cells	Di Vincenzo Umberto; Muzzetto Riccardo; Bedeschi Ferdinando
11302393	Techniques for programming a memory cell	Castro Hernan A.; Tortorelli Innocenzo; Pirovano Agostino; Pellizzer  Fabio
11302395	Apparatus having transistors with raised extension regions	Liu Haitao
11302397	Memory block select circuitry including voltage bootstrapping control	Yip Aaron
11302407	Memory proximity disturb management	McVay Jeffrey L.; Bradshaw Samuel E.; Eno Justin
11302410	Zone swapping for wear leveling memory	Pawlowski Joseph T.
11302589	Electron beam probing techniques and related structures	Majumdar Amitava; Kotti Radhakrishna; Rajashekharaiah Mallesh
11302628	Integrated assemblies having conductive-shield-structures between  linear-conductive-structures	Kaushik Naveen; Kamata Yoshihiko; Hill Richard J.; Ritter Kyle A.;  Iwasaki Tomoko Ogura; Liu Haitao
11302634	Microelectronic devices with symmetrically distributed staircase stadiums  and related systems and methods	Xu Lifang; Li Jian; Wolstenholme Graham R.; Tessariol Paolo; Matamis  George; Lomeli Nancy M.
11302653	Die features for self-alignment during die bonding	Street Bret K.; Zhou Wei; Gambee Christopher J.; Hacker Jonathan S.; Luo  Shijian
11302703	Apparatuses having memory cells with two transistors and one capacitor,  and having body regions of the transistors coupled with reference voltages	Karda Kamal M.; Mouli Chandra; Pulugurtha Srinivas; Gupta Rajesh N.
11302707	Integrated assemblies comprising conductive levels having two different  metal-containing structures laterally adjacent one another, and methods of  forming integrated assemblies	Hopkins John D.; Greenlee Jordan D.
11302708	Memory arrays, and methods of forming memory arrays	Kim Changhan; Carter Chet E.; Smith Cole; Howder Collin; Hill Richard J.;  Li Jie
11302710	Foundational supports within integrated assemblies	Clampitt Darwin A.; King Matthew J.; Hopkins John D.; Barclay M. Jared
11302712	Integrated circuitry, memory arrays comprising strings of memory cells,  methods used in forming integrated circuitry, and methods used in forming a  memory array comprising strings of memory cells	Tiwari Chandra; Jhothiraman Jivaan Kishore
11302748	Arrays of memory cells and methods of forming an array of  elevationally-outer-tier memory cells and elevationally-inner-tier memory  cells	Conti Anna Maria; Pirovano Agostino; Redaelli Andrea
11303274	Sub-threshold current reduction circuit switches and related apparatuses  and methods	Takashima Go
11303721	Memory device with a multi-mode communication mechanism	Rowley Matthew D.; Bauer Mark
11307632	Power disable of memory sub-system	Karthikeyan Manohar; Partou Mehdi
11307771	Configurable link interfaces for a memory device	Tatapudi Suryanarayana B.; Porter John David; Kim Jaeil; Kim Mijo
11307782	Host identification and verification system and method for a memory  system	Liang Qing; Huang Jun
11307799	Managing threshold voltage drift based on operating characteristics of a  memory sub-system	Lang Murong; Zhou Zhenming
11307861	Securing conditional speculative instruction execution	Wallach Steven Jeffrey
11307929	Memory device with status feedback for error correction	Schaefer Scott E.; Boehm Aaron P.
11307931	Using zones to manage capacity reduction due to storage device failure	Bert Luca
11307951	Memory device with configurable performance and defectivity management	Huang Jianmin; Luo Xiangang; Tanpairoj Kulachet
11307983	Maintaining data consistency in a memory subsystem that uses hybrid wear  leveling operations	Chen Ning; Zhu Jiangli; Tai Ying Yu
11308017	Reconfigurable channel interfaces for memory devices	Richter Michael Dieter
11309001	Apparatuses and methods for setting a duty cycle adjuster for improving  clock duty cycle	Kim Kang-Yong
11309010	Apparatuses, systems, and methods for memory directed access pause	Ayyapureddi Sujeet
11309012	Apparatuses and methods for staggered timing of targeted refresh  operations	Meier Nathaniel J.; Rehmeyer James S.
11309020	Dragging first pass read level thresholds based on changes in second pass  read level thresholds	Sheperek Michael; Koudele Larry J.; Liikanen Bruce A.
11309021	Systems and methods for stabilizing cell threshold voltage	Amato Paolo; Sforzin Marco
11309023	Memory cycling tracking for threshold voltage variation systems and  methods	Giduturi Hari
11309024	Memory cell programming that cancels threshold voltage drift	Giduturi Hari
11309039	Apparatus for determining a pass voltage of a read operation	Moschiano Violante; Ghilardi Tecla; Vali Tommaso; Camerlenghi Emilio;  Filipiak William C.; D'Alessandro Andrea
11309040	Managed NAND performance throttling	Blodgett Greg A.; Jean Sebastien Andre
11309045	Method and device for self trimming memory devices	Mondello Antonino; Troia Alberto
11309047	Test circuit using clock signals having mutually different frequency	Uemura Yutaka
11309049	Direct memory access using JTAG cell addressing	Troia Alberto; Mondello Antonino
11309052	Read voltage calibration for copyback operation	Muchherla Kishore K.; Righetti Niccolo'; McNeil, Jr. Jeffrey S.; Goda  Akira; Marquart Todd A.; Helm Mark A.; Golov Gil; Binfet Jeremy; Miccoli  Carmine; Puzzilli Giuseppina
11309055	Power loss test engine device and method	Giaccio Claudio; Pascale Ferdinando; Mastrangelo Raffaele; Di Martino  Erminio; D'Alessandro Ferdinando; Castellano Cristiano; Castaldo Andrea
11309057	Apparatuses and methods for post-package repair protection	Nakamura Takaaki
11309281	Overlapping die stacks for NAND package architecture	Tai Enyong; Takiar Hem P.; Wang Li; Ng Hong Wan
11309285	Three-dimensional stacking semiconductor assemblies and methods of  manufacturing the same	Fay Owen R.; Yoo Chan H.; Tuttle Mark E.
11309314	Array of capacitors and method used in forming an array of capacitors	Yokoyama Yuichi
11309315	Digit line formation for horizontally oriented access devices	McDaniel Terrence B.; Lee Si-Woo; Nair Vinay; Fumagalli Luca
11309321	Integrated structures containing vertically-stacked memory cells	Liu Haitao; Mouli Chandra; Koveshnikov Sergei; Pavlopoulos Dimitrios;  Huang Guangyu
11309328	Methods of forming microelectronic devices, and related microelectronic  devices, memory devices, and electronic systems	Luo Shuangqiang; Chary Indra V.; Dorhout Justin B.
11309919	Apparatuses and methods for pipelining memory operations with error  correction coding	Shang Wei Bing; Zhang Yu; Li Hong Wen; Fan Yu Peng; Liu Zhong Lai; Gao En  Peng; Zhang Liang
11310644	Wirelessly utilizable memory	Luo Fa-Long; Hush Glen E.; Boehm Aaron P.
11314425	Read error recovery	Luo Xiangang; Singidi Harish Reddy; Luo Ting; Muchherla Kishore Kumar
11314427	Memory device with enhanced data reliability capabilities	He Deping; Palmer David Aaron
11314429	Apparatuses and methods for operations using compressed and decompressed  data	Willcock Jeremiah J.; Lea Perry V.; Korzh Anton
11314446	Accelerated read translation path in memory sub-system	Lam Johnny A.
11314456	Memory device performance based on storage traffic pattern detection	Porzio Luca; Colella Nicola; Minopoli Dionisio
11314583	Memory data correction using multiple error control operations	He Deping; Liang Qing
11314591	Apparatuses and methods for error correction coding and data bus  inversion for semiconductor memories	Riho Yoshiro; Shimizu Atsushi; Park Sang-Kyun; Kwak Jongtae
11314643	Enhanced duplicate write data tracking for cache memory	Walker Robert M.
11315617	Access line management for an array of memory cells	Vimercati Daniele
11315619	Apparatuses and methods for distributing row hammer refresh events across  a memory device	Wolff Gregg D.
11315620	Semiconductor device performing row hammer refresh operation	Ishikawa Toru; Nakanishi Takuya; Bessho Shinji
11315622	DDR5 four-phase generator with improved metastability resistance	Penney Daniel B.; Gajapathy Parthasarathy; Ladner Brian J.
11315623	Techniques for saturating a host interface	Gyllenskog Christian M.
11315626	Sort operation in memory	Wheeler Kyle B.
11315627	Voltage drop mitigation techniques for memory devices	Chu Wei Lu; Pan Dong
11315633	Three-state programming of memory cells	Castro Hernan A.; Hirst Jeremy M.; Jain Shanky K.; Dodge Richard K.;  Melton William A.
11315641	Memory cell sensing	Xu Jun
11315642	Systems and methods providing improved calibration of memory control  voltage	Kavalipurapu Kalyan; Piccardi Michele; Guo Xiaojiang
11315647	Defect detection during program verify in a memory sub-system	Chiang Pinchou; Muralidharan Arvind; Esteves James I.; Piccardi Michele;  Pekny Theodore T.
11315877	Methods of forming microelectronic devices, and related microelectronic  devices, memory devices, and electronic systems	Greenlee Jordan D.; Hopkins John D.; Klein Rita J.; McTeer Everett A.; Xu  Lifang; Billingsley Daniel; Howder Collin
11315917	Apparatuses and methods for high sensitivity TSV resistance measurement  circuit	Ide Akira
11315939	Methods of incorporating leaker-devices into capacitor configurations to  reduce cell disturb, and capacitor configurations incorporating  leaker-devices	Calderoni Alessandro; Cook Beth R.; Ramaswamy Durai Vishak Nirmal; Chavan  Ashonita A.
11315941	Memory having a continuous channel	Tran Luan C.; Zhu Hongbin; Hopkins John D.; Hu Yushi
11316107	Semiconductor devices and related methods	Liu Jun; Parekh Kunal R.
11316561	System for optimizing routing of communication between devices and  resource reallocation in a network	Chritz Jeremy
11316841	Secure communication between an intermediary device and a network	Troia Alberto; Mondello Antonino
11320479	Semiconductor device with a data-recording mechanism	Plum Todd J.; Van De Graaff Scott D.
11320987	Scanning techniques for a media-management operation of a memory  sub-system	Zhu Fangfang; Wang Wei; Zhu Jiangli; Tai Ying Yu
11321008	Temperature-based memory management	Mayer Peter; Hein Thomas; Spirkl Wolfgang Anton; Brox Martin; Richter  Michael Dieter
11321168	Error identification in executed code	Mondello Antonino; Troia Alberto
11321173	Managing storage of multiple plane parity data in a memory sub-system	Luo Xiangang; Huang Jianmin; Vakati Lakshmi Kalpana K.; Singidi Harish R.
11321176	Reduced parity data management	Yeung Chun Sum
11321238	User process identifier based address translation	Sharma Prateek
11321257	Quality of service control of logical devices for a memory sub-system	Simionescu Horia C.; Wang Xiaodong; Raparti Venkata Yaswanth
11321468	Systems for providing access to protected memory	Cariello Giuseppe; Parry Jonathan
11322191	Charge extraction from ferroelectric memory cell	Vimercati Daniele
11322192	Apparatuses and methods for calculating row hammer refresh addresses in a  semiconductor device	Morohashi Masaru; Noguchi Hidekazu
11322194	Compensating offsets in buffers and related systems, methods, and devices	Someya Minoru; Suzuki Yukihide; Okuma Sadayuki
11322196	Sense amplifier with lower offset and increased speed	Guo Xinwei; Vimercati Daniele
11322209	Memory devices including voltage generation systems	Piccardi Michele; Kavalipurapu Kalyan C.; Guo Xiaojiang
11322211	Memory devices having a differential storage device	Bonitz Rainer
11322218	Error control for memory device	Yamamoto Nobuo; Morgan Donald Martin; Wong Victor; Kwak Jongtae
11322223	JTAG based architecture allowing multi-core operation	Mondello Antonino; Troia Alberto
11322388	Semiconductor structure formation	Yadav Vivek; Hu Shen; Li Kangle; Sapra Sanjeev
11322502	Apparatus including barrier materials within access line structures, and  related methods and electronic systems	Kim Dojun; Petz Christopher W.; Kelkar Sanket S.; Nobuto Hidekazu
11322516	Microelectronic devices including isolation structures protruding into  upper pillar portions, and related methods and systems	King Matthew J.; Daycock David A.; Fukuzumi Yoshiaki; Fayrushin Albert;  Hill Richard J.; Tiwari Chandra S.; Fujiki Jun
11322629	Method and optoelectronic structure providing polysilicon photonic  devices with different optical properties in different regions	Meade Roy; Mehta Karan; Megged Efraim; Orcutt Jason; Popovic Milos; Ram  Rajeev; Shainline Jeffrey; Sternberg Zvi; Stojanovic Vladimir; Tehar-Zahav  Ofer
11323027	Stage protection in multi-stage charge pumps	Piccardi Michele; Guo Xiaojiang
11323275	Verification of identity using a secret key	Mondello Antonino; Troia Alberto
11323521	Edge device	Velamur Sharmila; Simsek-Ege Fatma Arzum; Srivastava Shivani; Pontoh  Marsela; Sriram Lavanya
11327113	Memory loopback systems and methods	Wilmoth David D.
11327551	Methods and apparatus for characterizing memory devices	Harms Jonathan D.
11327832	Bit and signal level mapping	Dietrich Stefan; Brox Martin; Richter Michael Dieter; Hein Thomas;  Schneider Ronny; Jovanovic Natalija
11327862	Multi-lane solutions for addressing vector elements using vector index  registers	Wallach Steven Jeffrey
11327867	On-die logic analyzer	Callaghan Jackson N.; Ohara Kazuaki; Shin Ji-Hye G.; Prasad Vyjayanthi;  Avila-Hernandez Rosa M.; Ghosh Gitanjali T.; Skreen Rachael R.
11327884	Self-seeded randomizer for data randomization in flash memory	Chen Zhengang; Huang Jianmin
11327892	Latency-based storage in a hybrid memory system	Caraccio Danilo; Confalonieri Emanuele; Dallabora Marco; Izzi Roberto;  Amato Paolo; Balluchi Daniele; Porzio Luca
11328210	Self-learning in distributed architecture for enhancing artificial neural  network	Mondello Antonino; Troia Alberto
11328599	Crowdsourcing road conditions from abnormal vehicle events	Sato Junichi
11328749	Conductive interconnects and methods of forming conductive interconnects	Ahmed Raju; Kewley David A.; Pratt Dave; Sung Yung-Ta; Speetjens Frank;  Lugani Gurpreet
11328777	Responding to power loss	Tang Qiang; Pekny Theodore T.
11328782	Memory architecture for access of multiple portions of a block of memory  cells	Liang Ke; Xu Jun
11328789	Intelligent memory device test rack	Hamor Gary D.; Spica Michael R.; Shepard Donald; Caraher Patrick; Elmiro  da Rocha Chaves João
11328967	Electrical device with test pads encased within the packaging material	De La Cerda Joseph A.
11328997	Through-core via	Monroe Matthew
11329026	Apparatuses and methods for internal heat spreading for packaged  semiconductor die	Hembree David R.
11329051	Gate dielectric repair on three-node access device formation for vertical  three-dimensional (3D) memory	Smythe, III John A.; Sandhu Gurtej S.; Saeedi Vahdat Armin; Lee Si-Woo;  Sills Scott E.
11329058	Microelectronic devices and memory devices	Yip Aaron S.
11329062	Memory arrays and methods used in forming a memory array	Dorhout Justin B.; Byers Erik; Carlson Merri L.; Chary Indra V.; Fazil  Damir; Hopkins John D.; Lomeli Nancy M.; Nelson Eldon; Peterson Joel D.;  Pavlopoulos Dimitrios; Tessariol Paolo; Xu Lifang
11329064	Integrated assemblies and methods of forming integrated assemblies	Abdelrahaman Ramey M.; Wu Jeslin J.; Tiwari Chandra; Shrotri Kunal;  Lengade Swapnil
11329127	Memory device including voids between control gates	Carlson Chris M.
11329133	Integrated assemblies having semiconductor oxide channel material, and  methods of forming integrated assemblies	Lee Yi Fang; Asano Isamu; Gandhi Ramanathan; Sills Scott E.
11329673	Memory error correction based on layered error detection	Hanna Stephen D.
11329983	Validating an electronic control unit of a vehicle	Mondello Antonino; Troia Alberto
11330101	Managing spoofed calls to mobile devices	de la Garza Villarreal Elsie; Wale Madison E.; Chhabra Bhumika; Delaney  Claudia A.
11331767	Pads for chemical mechanical planarization tools, chemical mechanical  planarization tools, and related methods	Bresson James
11334129	Temperature control component for electronic systems	Scobee Daniel G.; Semenuk Aleksandr; Thiruvengadam Aswin
11334259	Power management based on detected voltage parameter levels in a memory  sub-system	Yu Liang; Filipiak William C.
11334260	Adaptive memory system	Roberts David Andrew
11334265	Data programming	Srinivasan Dheeraj; Mohammadzadeh Ali
11334270	Key-value store using journaling with selective data storage format	Kurichiyath Sudheer; Becker Greg A.; Boles David; Moyer Steven;  Meeramohideen Mohamed Nabeel; Tomlinson Alexander
11334278	Performing operation on data blocks concurrently and based on performance  rate of another operation on data blocks	Zhang Yang
11334287	Data stream identification and processing in data storage device	Frolikov Alex
11334362	Generating and executing a control flow	Wheeler Kyle B.; Murphy Richard C.; Manning Troy A.; Klein Dean A.
11334377	Controller for a memory component	Mondello Antonino; Troia Alberto
11334387	Throttle memory as a service based on connectivity bandwidth	Eilert Sean Stephen; Akel Ameen D.; Bradshaw Samuel E.; Curewitz Kenneth  Marion; Yudanov Dmitri
11334413	Estimating an error rate associated with memory	Parthasarathy Sivagnanam; Kaynak Mustafa N.; Khayat Patrick R.;  Richardson Nicholas J.
11334426	CRC error alert synchronization	Mai Thanh K.; Vankayala Vijayakrishna J.
11334428	Multi-page parity protection with power loss handling	Singidi Harish Reddy; Muchherla Kishore Kumar; Luo Xiangang; Rayaprolu  Vamsi Pavan; Malshe Ashutosh
11334433	Storing parity data mid stripe	Boals Daniel A.
11334435	Safety event detection for a memory device	Boehm Aaron P.; Schaefer Scott E.
11334458	Completing memory repair operations interrupted by power loss	Wilson Alan J.; Morgan Donald Martin
11334500	Memory module data object processing systems and methods	Murphy Richard C.
11334502	Memory protection based on system state	Dover Lance W.
11334655	Authenticating a device using a remote host	Duval Olivier
11335383	Memory component for a system-on-chip device	Troia Alberto; Mondello Antonino
11335384	Capacitive voltage dividers coupled to voltage regulators	Rowley Matthew D.
11335385	Apparatuses including temperature-based threshold voltage compensated  sense amplifiers and methods for compensating same	Lam Boon Hor; Major Karl L.; Hawkins Jonathan; Ahmad Galaly
11335393	Semiconductor device performing refresh operation in deep sleep mode	Riho Yoshiro; Matsui Yoshinori; Furutani Kiyohiro; Fukiage Takahiko; Nam  Ki-Jun; Porter John D.
11335394	Temperature informed memory refresh	Alsasua Gianni Stephen; Singidi Harish Reddy; Muchherla Kishore Kumar;  Ratnam Sampath; Malshe Ashutosh; Rayaprolu Vamsi Pavan; Padilla, Jr. Renato
11335396	Timing signal delay for a memory device	Huang Zhi Qi; Chu Wei Lu; Pan Dong
11335402	Systems and techniques for accessing multiple memory cells concurrently	Pio Federico
11335403	Techniques for programming multi-level self-selecting memory cell	Robustelli Mattia
11335404	Memory device including multiple select gates and different bias  conditions	Goda Akira; Liu Haitao; Lee Changhyun
11335407	One-ladder read of memory cells coarsely programmed via interleaved  two-pass data programming techniques	Nguyen Phong Sy; Fitzpatrick James; Muchherla Kishore Kumar
11335408	Event counters for memory operations	Sforzin Marco; Di Vincenzo Umberto
11335412	Managing sub-block erase operations in a memory sub-system	Kavalipurapu Kalyan Chakravarthy; Iwasaki Tomoko Ogura; Yu Erwin E.; Chen  Hong-Yan; Xu Yunfei
11335415	Memories having multiple voltage generation systems connected to a  voltage regulator	Piccardi Michele
11335416	Operational modes for reduced power consumption in a memory system	Sforzin Marco; Di Vincenzo Umberto; Balluchi Daniele
11335418	Memory device including dynamic programming voltage	Lee Eric N.; Miranda Lawrence Celso
11335425	Memory system quality integral analysis and configuration	Liikanen Bruce A.; Cadloni Gerald L.; Miller David
11335426	Targeted test fail injection	Pecha Brian Thomas; Groulik Brent Thomas; Copic Nicholas Kenley
11335429	Error recovery operations within a memory sub-system	Hu Guang; Luo Ting; Yueng Chun Sum
11335558	Methods of forming structures utilizing self-assembling nucleic acids	Sandhu Gurtej S.
11335563	Pitch reduction technology using alternating spacer depositions during  the formation of a semiconductor device and systems including same	Zhou Baosuo; Abatchev Mirzafer K.; Niroomand Ardavan; Morgan Paul A.;  Meng Shuang; Greeley Joseph Neil; Coppa Brian J.
11335602	Methods of forming microelectronic devices, and related microelectronic  devices and electronic systems	Parekh Kunal R.
11335626	Integrated assemblies and methods of forming integrated assemblies	Chen Zhuo; Vasilyeva Irina V.; Fan Darwin Franseda; Muthukrishnan Kamal  Kumar
11335644	Apparatuses and methods for shielded memory architecture	Bedeschi Ferdinando; Di Vincenzo Umberto; Vimercati Daniele
11335667	Stacked semiconductor die assemblies with die substrate extensions	Watanabe Fumitomo; Kusanagi Keiyo
11335675	Circuit-protection devices	Smith Michael
11335684	Memory device having 2-transistor memory cell and access line plate	Karda Kamal M.; Sarpatwari Karthik; Liu Haitao; Ramaswamy Durai Vishak  Nirmal
11335694	Memory arrays and methods used in forming a memory array comprising  strings of memory cells	Howder Collin; Carter Chet E.
11335700	Block-on-block memory array architecture using bi-directional staircases	Yip Aaron S.
11335775	Integrated assemblies and methods of forming integrated assemblies	Pulugurtha Srinivas; Guha Jaydip; Sills Scott E.; Lee Yi Fang
11335788	Semiconductor devices, transistors, and related methods for contacting  metal oxide semiconductor devices	Ramaswamy Durai Vishak Nirmal; Gandhi Ramanathan; Sills Scott E.
11336265	Internal clock distortion calibration using DC component offset of clock  signal	Wang Guan; Tang Qiang; Ghalam Ali Feiz Zarrin
11336298	Error correction bit flipping scheme	Kwak Jongtae
11336303	Advanced bitwise operations and apparatus in a multi-level system with  nonvolatile memory	Eisenhuth Robert B.; Van Aken Stephen P.
11336433	Secure sensor communication	Troia Alberto; Mondello Antonino
11340787	Memory protocol	Walker Robert M.; Hall, Jr. James A.
11340806	Meta data processing during startup of storage devices	Frolikov Alex
11340808	Latency-based storage in a hybrid memory system	Caraccio Danilo; Confalonieri Emanuele; Dallabora Marco; Izzi Roberto;  Amato Paolo; Balluchi Daniele; Porzio Luca
11340813	Reliability scan assisted voltage bin selection	Rayaprolu Vamsi Pavan; Nowell Shane; Sheperek Michael
11340830	Memory buffer management and bypass	Hasbun Robert Nasry; Gans Dean D.; Daruwalla Sharookh
11340831	Systems and methods for adaptive read training of three dimensional  memory	Lu Yang; Stoddard Christopher Heaton
11340833	Systems and methods for data relocation using a signal development cache	Jain Shanky Kumar; Yudanov Dmitri A.
11340836	Virtual partition management in a memory device	Della Monica Angelo; Yuen Eric Kwok Fung; Cimmino Pasquale; Iaculo  Massimo; Falanga Francesco
11340904	Vector index registers	Wallach Steven Jeffrey
11340908	Reducing data hazards in pipelined processors to provide high processor  utilization	Crook Neal Andrew; Wootton Alan T.; Peterson James
11340981	Modifying conditions for memory device error connection operations	Shen Zhenlei; Xie Tingjun
11340982	Memory block defect detection and management	Hu Guang; Luo Ting
11340983	Error code calculation on sensing circuitry	Lea Perry V.; Finkbeiner Timothy P.
11340984	Apparatuses, systems, and methods for error correction	Nakanishi Takuya; Ishikawa Toru; Arai Minari
11341036	Biased sampling methodology for wear leveling	Tai Ying Yu; Zhu Jiangli
11341038	Data movement operations in non-volatile memory	Rehmeyer James S.; Cowles Timothy B.
11341041	Synchronizing NAND logical-to-physical table region tracking	Cui Zhao; Yuen Eric Kwok Fung; Wang Guan Zhong; Duan Xinghui; D'Eliseo  Giuseppe; Ferrari Giuseppe
11341046	Layer interleaving in multi-layered memory	Chen Mikai; Chen Zhengang; Kwong Charles See Yeung
11341048	SLC cache allocation	Duan Xinghui; Wang Guanzhong; Zhang Xu; Yuen Eric Kwok Fung
11341050	Secure logical-to-physical caching	Szubbocsev Zoltan; Troia Alberto; Tiziani Federico; Mondello Antonino
11341057	Configurable logic block networks and managing coherent memory in the  same	Chritz Jeremy; Hulton David
11341849	Lane departure apparatus, system and method	Troia Alberto; Mondello Antonino
11342007	Capacitance allocation based on system impedance	Badrieh Fuad
11342014	Driver leakage control	Ingalls Charles L.
11342024	Tracking operations performed at a memory device	Varisco Laura; Bongu Swetha; Kulkarni Kirthi Ravindra; Venigalla Soujanya
11342034	Reducing programming disturbance in memory devices	Yip Aaron
11342039	Word line characteristics monitors for memory devices and associated  methods and systems	Prather Matthew A.; Rooney Randall J.
11342041	Apparatuses, systems, and methods for probabilistic data structures for  error tracking	Ayyapureddi Sujeet
11342042	Interconnected command/address resources	Johnson Jason M.; Fujiwara Yoshinori; Werhane Kevin G.
11342218	Single crystalline silicon stack formation and bonding to a CMOS wafer	Lee Si-Woo; Kim Byung Yoon
11342265	Apparatus including a dielectric material in a central portion of a  contact via, and related methods, memory devices and electronic systems	Greenlee Jordan D.; Xu Lifang; Klein Rita J.; Li Xiao; McTeer Everett A.
11342277	Semiconductor device assemblies with conductive underfill dams for  grounding EMI shields and methods for making the same	Lee Jungbae
11342336	Integrated circuitry, memory circuitry, method used in forming integrated  circuitry, and method used in forming memory circuitry	Benson Russell A.
11342356	Memory cells comprising a programmable field effect transistor having a  reversibly programmable gate insulator	Bedeschi Ferdinando
11342382	Capacitive pillar architecture for a memory array	Tortorelli Innocenzo; Pellizzer Fabio
11342906	Delay circuits, and related semiconductor devices and methods	Akamatsu Hiroshi; Huang Zhi Qi
11347401	Memory device including mixed non-volatile memory cell types	Tanzawa Toru
11347402	Performing wear leveling operations in a memory based on block cycles and  use of spare blocks	Monteleone Domenico; Bernardi Giacomo; Porzio Luca; Mirichigni Graziano;  Zanardi Stefano; Di Martino Erminio
11347405	Memory device with dynamic program-verify voltage calibration	Koudele Larry J.; Liikanen Bruce A.
11347415	Selection component that is configured based on an architecture  associated with memory devices	Rajgopal Suresh; Yahja Henrico L.; Eskildsen Steven; Carter Dustin J.
11347429	Live firmware activation in a memory system	Frolikov Alex
11347434	Block family tracking for memory devices	Ish Mark
11347585	Compression method for defect visibility in a memory device	Li Jiyun; Gossi Johnathan L.
11347648	Direct cache hit and transfer in a memory sub-system that programs  sequentially	Guda Chandra M.; Lam Johnny A.
11347659	Low cost and low latency logical unit erase	Hanna Stephen
11347663	Memory device interface communicating with set of data bursts  corresponding to memory dies via dedicated portions for command processing	Pilolli Luigi
11347666	Apparatuses and methods including memory commands for semiconductor  memories	Kim Kang-Yong; Gans Dean
11348245	Adapted scanning window in image frame of sensor for object detection	Golov Gil
11348622	Conditional write back scheme for memory	Murphy Richard C.; Hush Glen E.; Sun Honglin
11348630	Self reference for ferroelectric memory	Vimercati Daniele
11348631	Apparatuses, systems, and methods for identifying victim rows in a memory  device which cannot be simultaneously refreshed	Wu Jun; Zhang Yu; Pan Dong
11348633	Selectively controlling clock transmission to a data (DQ) system	Miyano Kazutaka
11348635	Memory cell biasing techniques during a read operation	Locatelli Andrea; Servalli Giorgio; Visconti Angelo
11348636	On-demand high performance mode for memory write commands	Tanpairoj Kulachet; Huang Jianmin
11348637	Electrical distance-based remapping in a memory device	Giduturi Hari
11348640	Charge screening structure for spike current suppression in a memory  array	Venkatesan Srivatsan; Rajarajan Sundaravadivel; Soundappa Elango Iniyan;  Cassel Robert Douglas
11348650	Destruction of data and verification of data destruction on a memory  device	Stoller Scott Anthony; Brandt Kevin R; Lin Qisong
11348655	Memory device with analog measurement mode features	Troia Alberto; Mondello Antonino
11348659	Adjustable voltage drop detection threshold in a memory device	Cariello Giuseppe
11348660	Semiconductor device performing loop-back test operation	Morishita Yoshihito; Ichikawa Hiroshi
11348788	Methods for device fabrication using pitch reduction	Tran Luan C.; Giridhar Raghupathy
11348826	Integrated circuitry and methods	Wells David H.
11348856	Thermal cooling element for memory devices of a memory sub-system	Munson Rolf Thornton
11348857	Lidded microelectronic device packages and related systems, apparatus,  and methods of manufacture	Qu Xiaopeng
11348871	Integrated assemblies	Juengling Werner
11348875	Semiconductor devices with flexible connector array	Sinha Koustav; Qu Xiaopeng
11348928	Thin film transistor random access memory	Fackenthal Richard E.
11348932	Integrated assemblies having transistor body regions coupled to  carrier-sink-structures; and methods of forming integrated assemblies	Karda Kamal M.; Liu Haitao; Ramaswamy Durai Vishak Nirmal; Gao Yunfei;  Tang Sanh D.; Pandey Deepak Chandra
11348933	Integrated assemblies having anchoring structures proximate stacked  memory cells, and methods of forming integrated assemblies	Parekh Kunal R.; Dorhout Justin B.; Lomeli Nancy M.
11348939	Integrated assemblies, and methods of forming integrated assemblies	Howder Collin; Haller Gordon A.
11349479	Input buffer circuit	Matsuno Hiroyuki; Tsukada Shuichi
11349498	Bit flipping low-density parity-check decoders with low error floor	Kaynak Mustafa N.; Parthasarathy Sivagnanam
11349526	Pre-distortion for multi-level signaling	Spirkl Wolfgang Anton; Richter Michael Dieter; Brox Martin; Mayer Peter;  Hein Thomas
11349636	Local ledger block chain for secure updates	Mondello Antonino; Troia Alberto
11353206	Solid state lights with cooling structures	Sills Scott E.
11353942	Power delivery timing for memory	Benjamin Keith A.; Dougherty Thomas
11353944	Predictive power management	Badrieh Fuad; Choi Baekkyu; Kinsley Thomas H.
11354037	Scan frequency modulation based on memory density or block usage	Rayaprolu Vamsi Pavan; Ratnam Sampath K.; Singidi Harish R.; Malshe  Ashutosh; Muchherla Kishore Kumar
11354040	Apparatuses and methods for concurrently accessing multiple partitions of  a non-volatile memory	Sundaram Rajesh; Kau Derchang; Jungroth Owen W.; Chu Daniel; Zeng Raymond  W.; Qawami Shekoufeh
11354043	Temperature-based block family combinations in a memory device	Kientz Steven Michael; Koudele Larry J.; Nowell Shane; Sheperek Michael;  Liikanen Bruce A.
11354052	Memory sub-system media management operation threshold	Luo Xiangang; Huang Jianmin; Malshe Ashutosh
11354056	Predictive data orchestration in multi-tier memory systems	Mittal Samir; Ray Anirban; Anand Gurpreet
11354064	Detection of illegal commands	Richter Michael Dieter; Balb Markus
11354066	Command filter filtering command having predetermined pulse width	Bessho Shinji; Nakanishi Takuya
11354067	Asymmetric plane driver circuits in a multi-plane memory device	Kavalipurapu Kalyan Chakravarthy C.; Siau Chang H.; Yamada Shigekazu
11354134	Processing-in-memory implementations of parsing strings against  context-free grammars	Yudanov Dmitri
11354147	Class of service for multi-function devices	Bert Luca
11354177	Grouping requests to reduce inter-process communication in memory systems	Frolikov Alex
11354187	Physical page, logical page, and codeword correspondence	Manning Troy A.; Larsen Troy D.; Culley Martin L.
11354193	Memory device with dynamic processing level calibration	Koudele Larry J.; Liikanen Bruce A.
11354246	Memory-side transaction context memory interface systems and methods  based on clock cycles and wires	Roberts David Andrew
11354262	Parallel operations in aggregated and virtualized solid state drives	Kale Poorna; Bueb Christopher Joseph
11355162	Active boundary quilt architecture memory	Laurent Christophe Vincent Antoine
11355164	Bias current generator circuitry	Hsieh Ming-ta; Loftsgaarden Taylor
11355165	Adjusting parameters of channel drivers based on temperature	Porter John David; Tatapudi Suryanarayana B.
11355166	Sequential memory operation without deactivating access line signals	Sakui Koji; Feeley Peter Sean
11355169	Indicating latency associated with a memory request in a system	Hasbun Robert Nasry; Gans Dean D.; Daruwalla Sharookh
11355170	Reconfigurable processing-in-memory logic	Yudanov Dmitri
11355174	Self-referencing memory device	Muzzetto Riccardo
11355175	Deep learning accelerator and random access memory with a camera  interface	Kale Poorna; Cummins Jaime
11355178	Apparatuses and methods for performing an exclusive or operation using  sensing circuitry	Manning Troy A.
11355200	Hybrid routine for a memory device	Hansen Shannon Marissa; Rori Fulvio; D'Alessandro Andrea; Nevill Jason  Lee; Cerafogli Chiara
11355203	Determine optimized read voltage via identification of distribution shape  of signal and noise characteristics	Alhussien AbdelHakim S.; Fitzpatrick James; Khayat Patrick Robert;  Parthasarathy Sivagnanam
11355206	High-voltage shifter with degradation compensation	Yamada Shigekazu
11355209	Accessing a multi-level memory cell	Sarpatwari Karthik; Tran Xuan-Anh; Chen Jessica; Durand Jason A.; Gajera  Nevil N.; Lee Yen Chun
11355214	Debugging memory devices	Kim Junam
11355348	Integrated circuit, construction of integrated circuitry, and method of  forming an array	Lugani Gurpreet; Campbell Kyle B.; Di Cino Mario J.; Freese Aaron W.;  Kogan Alex; Shea Kevin R.
11355392	Conductive via of integrated circuitry, memory array comprising strings  of memory cells, method of forming a conductive via of integrated circuitry,  and method of forming a memory array comprising strings of memory cells	Wang Yiping; Greenlee Jordan D.; Howder Collin
11355508	Devices including floating vias and related systems and methods	Li Hongqi; Cultra James A.; Vegunta Sri Sai Sivakumar
11355514	Microelectronic devices including an oxide material between adjacent  decks, electronic systems, and related methods	Bicksler Andrew; Ng Wei Yeeng; Brighten James C.
11355531	Array of capacitors, an array of memory cells, method used in forming an  array of memory cells, methods used in forming an array of capacitors, and  methods used in forming a plurality of horizontally-spaced conductive lines	Mariani Marcello; Servalli Giorgio
11355554	Sense lines in three-dimensional memory arrays, and methods of forming  the same	Yang Lingming; Sarpatwari Karthik; Pellizzer Fabio; Gajera Nevil N.; Wei  Lei
11355607	Semiconductor device structures with liners	Larsen Christopher J.; Daycock David A.; Shrotri Kunal
11356081	Average interval generator	Noguchi Hidekazu
11356256	Secure vehicular part communication	Mondello Antonino; Troia Alberto
11356265	Secure communication between a vehicle and a remote device	Troia Alberto; Mondello Antonino
11356378	Combined write enable mask and credit return field	Brewer Tony; Patrick David
11356601	Intelligent digital camera having deep learning accelerator and random  access memory	Kale Poorna
11360533	Device maintenance of a data storage device including wear levelling,  garbage collection, or combination thereof	Kale Poorna; Rao Kishore
11360670	Dynamic temperature compensation in a memory component	Koudele Larry J.; Liikanen Bruce A.; Kientz Steve
11360672	Performing hybrid wear leveling operations based on a sub-total write  counter	Zhu Fangfang; Zhu Jiangli; Chen Ning; Tai Ying Yu
11360677	Selective partitioning of sets of pages programmed to memory device	Muchherla Kishore Kumar; Schuh Karl D.; Wu Jiangang; Kaynak Mustafa N.;  Batutis Devin M.; Luo Xiangang
11360695	Apparatus with combinational access mechanism and methods for operating  the same	Lee Hyun Yoo; Kim Kang-Yong
11360700	Partitions within snapshot memory for buffer and snapshot memory	Muchherla Kishore K.; Righetti Niccolo'; McNeil, Jr. Jeffrey S.; Goda  Akira; Marquart Todd A.; Helm Mark A.; Golov Gil; Binfet Jeremy; Miccoli  Carmine; Puzzilli Giuseppina
11360704	Multiplexed signal development in a memory device	Yudanov Dmitri A.; Jain Shanky Kumar
11360777	Cache systems and circuits for syncing caches or cache sets	Wallach Steven Jeffrey
11360848	Error correction code scrub scheme	Kwak Jongtae
11360868	Redundant cloud memory storage for a memory subsystem	Pio Federico
11360885	Wear leveling based on sub-group write counts in a memory sub-system	Stonelake Paul; Chen Ning; Zhu Fangfang; Tang Alex
11360888	Host system notification based on entry miss	Huo Binbin
11360902	Adaptive readahead cache manager based on detected active streams of read  commands	Palmer David A.
11360920	Mapping high-speed, point-to-point interface channels to packet virtual  channels	Patrick David; Brewer Tony
11361552	Security operations of parked vehicles	Kale Poorna; Bielby Robert Richard Noel
11361660	Verifying identity of an emergency vehicle during operation	Mondello Antonino; Troia Alberto
11361801	Sub-threshold voltage leakage current tracking	Fantini Paolo; Amato Paolo; Sforzin Marco
11361806	Charge sharing between memory cell plates	Carman Eric S.
11361808	Apparatuses and methods for selective row refreshes	Bell Debra M.; McClain Jeff A.; Callaway Brian P.
11361814	Column selector architecture with edge mat optimization	He Yuan; Akamatsu Hiroshi
11361825	Dynamic program erase targeting with bit error rate	Liikanen Bruce A.; Sheperek Michael; Koudele Larry J.
11361827	Memory devices having source lines directly coupled to body regions and  methods	Goda Akira
11361830	Adjusting read voltage levels based on a programmed bit count in a memory  sub-system	Majerus Douglas E.
11361831	Proactive read disturb mitigation	Sharifi Tehrani Saeed; Parthasarathy Sivagnanam
11361833	Offset memory component automatic calibration (autocal) error recovery  for a memory subsystem	Liikanen Bruce A.; Cadloni Gerald L.; Besinga Gary F.; Miller Michael G.;  Padilla Renato C.
11361837	Memory location age tracking on memory die	Trivedi Falgun G.
11361972	Methods for selectively removing more-doped-silicon-dioxide relative to  less-doped-silicon-dioxide	Imonigie Jerome A.; Venkatanarayanan Ramaswamy Ishwar; Sharma Pranav P.;  Kron Eric E.; Sapra Sanjeev
11362018	Low capacitance through substrate via structures	Pandey Deepak C.; Liu Haitao; Mouli Chandra
11362070	Microelectronic device assemblies and packages including multiple device  stacks and related methods	Limaye Aparna U.; Lim Dong Soon; Richards Randon K.; Fay Owen R.
11362071	Stacked semiconductor dies for semiconductor device assemblies	Ko Yeongbeom; Kwon Youngik; Paek Jong Sik; Lee Jungbae
11362103	Memory arrays, and methods of forming memory arrays	Kim Changhan; Carnevale Gianpietro
11362142	Electronic apparatus with tiered stacks having conductive structures  isolated by trenches, and related electronic systems and methods	Hu Yi
11362175	Select gate gate-induced-drain-leakage enhancement	Fayrushin Albert; Liu Haitao; King Matthew J.
11362627	Process tracking pulse generator	Chu Wei Lu; Pan Dong
11362939	Flow control for a multiple flow control unit interface	Brewer Tony
11363433	Memory pooling between selected memory resources on vehicles or base  stations	Boehm Aaron P.
11366487	Resetting clock divider circuitry prior to a clock restart	Ito Koji
11366505	Predictive power management	Badrieh Fuad; Choi Baekkyu; Kinsley Thomas H.
11366592	Selective dummy writes for asynchronous power loss handling in memory  devices	Miller Michael G.; Besigna Gary F.
11366675	Systems and devices for accessing a state machine	Noyes Harold B; Brown David R.; Glendenning Paul
11366752	Address mapping between shared memory modules and cache sets	Yudanov Dmitri
11366754	Adjustable buffer memory space	Brandt Kevin R
11366760	Memory access collision management on a shared wordline	Alhussien Abdelhakim; Wu Jiangang; Schuh Karl D.; Lin Qisong; Hoei Jung  Sheng
11366762	Cache filter	Walker Robert M.
11366772	Separate inter-die connectors for data and error correction information  and related systems, methods, and apparatuses	Vankayala Vijayakrishna J.
11366784	Fuseload architecture for system-on-chip reconfiguration and repurposing	Pinilla Pico Lady Nataly; Gopalapuram Praveen; Mote Akshay Arun
11366976	Updating manufactured product life cycle data in a database based on  scanning of encoded images	Principato Giuseppe
11367473	Wave pipeline	Shakeri Kaveh; Feiz Zarrin Ghalam Ali; Tang Qiang; Lee Eric N.
11367476	Bit line equalization driver circuits and related apparatuses, methods,  and computing systems to avoid degradation of pull-down transistors	Park Sang-Kyun; He Yuan
11367483	Techniques for applying multiple voltage pulses to select a memory cell	Hamada Josephine T.; Cui Mingdong; McCrate Joseph M.; Sarpatwari Karthik;  Chen Jessica
11367484	Multi-step pre-read for write operations in memory devices	Lee Yen Chun; Gajera Nevil N.; Sarpatwari Karthik
11367486	Apparatuses and methods using negative voltages in part of memory write,  read, and erase operations	Sakui Koji
11367490	Capacitive voltage modifier for power management	Rowley Matthew D.; Carter Dustin J.
11367495	Microelectronic device testing, and associated methods, devices, and  systems	Amrie Bin Shaari Ahmad Zainal; Ichida Hideyuki
11367497	Memory device with improved sensing structure	Troia Alberto; Mondello Antonino
11367502	Bad block management for memory sub-systems	Awusie Roland J.
11367667	Build-up package for integrated circuit devices, and methods of making  same	Ng Hong Wan; Lee Choon Kuan; Corisis David J.; Chong Chin Hui
11367681	Slit oxide and via formation techniques	Li Hongqi; Sagi Kaushik Varma; Siddik Manzar
11367726	Vertical digit lines for semiconductor devices	Lee Si-Woo; Hwang Sangmin
11367730	Cell disturb prevention using a leaker device to reduce excess charge  from an electronic device	Ramaswamy Durai Vishak Nirmal
11367822	High-voltage solid-state transducers and associated systems and methods	Schubert Martin F.
11368044	In-use charging for wearable devices having partitioned batteries	Wale Madison E.; Chhabra Bhumika; Delaney Claudia A.; de la Garza  Villarreal Elsie
11368142	Duty-cycle corrector circuits and related apparatuses and methods	Kuzmenka Maksim; Bernal Elena Cabrera
11372043	Heat spreaders for use in semiconductor device testing, such as burn-in  testing	Qu Xiaopeng; Griffin Amy R.; Orme Wesley J.
11372545	Managing bin placement for block families of a memory device based on  trigger metric values	Nowell Shane; Kaynak Mustafa N
11372550	Apparatuses and methods for simultaneous in data path compute operations	Lea Perry V.; Hush Glen E.
11372585	Asynchronous process topology in a memory device	Hush Glen E.; Murphy Richard C.; Sun Honglin
11372595	Read broadcast operations associated with a memory device	Yudanov Dmitri A.; Jain Shanky Kumar
11372648	Extended tags for speculative and normal executions	Wallach Steven Jeffrey
11372716	Detecting special handling metadata using address verification	Schuh Karl D.
11372762	Prefetch buffer of memory sub-system	Narsale Ashay
11372763	Prefetch for data interface bridge	Narsale Ashay; Walker Robert
11373375	Augmented reality product display	Viswanathan Radhika; Hosseinimakarem Zahra; Chhabra Bhumika; Christensen  Carla L.
11373466	Data recorders of autonomous vehicles	Golov Gil
11373527	Driver assistance for non-autonomous vehicle in an autonomous environment	Mondello Antonino; Troia Alberto
11373691	Clock locking for packet based communications of memory devices	Johnson James Brian
11373695	Memory accessing with auto-precharge	Swami Shivam; Eilert Sean S.; Akel Ameen D.
11373705	Dynamically boosting read voltage for a memory device	Ciocchini Nicola; Gotti Andrea
11373712	Dynamic programming of valley margins	Sheperek Michael; Koudele Larry J.; Liikanen Bruce A.
11373714	Reduced proximity disturb management via media provisioning and write  tracking	Eno Justin; Bradshaw Samuel E.
11373724	Safety and correctness data reading in non-volatile memory devices	Troia Alberto; Mondello Antonino
11373725	Error correction code circuits having one-to-one relationships with  input/output pads and related apparatuses and methods	Liang Zer; Arai Minari; Nakanishi Takuya
11373729	Grown bad block management in a memory sub-system	Liu Tao; Yeung Chun Sum; Luo Xiangang
11373913	Method of forming an array of vertical transistors	Pandey Deepak Chandra; Liu Haitao; Karda Kamal M.
11373914	Array of vertical transistors, an array of memory cells comprising an  array of vertical transistors, and a method used in forming an array of  vertical transistors	Calabrese Marcello; Rigano Antonino; Mariani Marcello
11373979	Stacked microfeature devices and associated methods	Heng Mung Suan; Tan Kok Chua; Leong Vince Chan Seng; Johnson Mark S.
11374007	Memory arrays	Tang Sanh D.; Roberts Martin C.
11374059	Memory cells having resistors and formation of the same	Pellizzer Fabio; Redaelli Andrea; Pirovano Agostino; Tortorelli Innocenzo
11374132	Electronic devices including capacitors with multiple dielectric  materials, and related systems	Smith Michael A.
11374488	Multi-mode voltage pump and control	Pan Dong; Barry Beau D.; Liu Liang
11374592	Iterative error correction with adjustable parameters after a threshold  number of iterations	Gad Eyal En; Chen Zhengang; Parthasarathy Sivagnanam; Weinberg Yoav
11378603	Voltage or current detector for a memory component	Troia Alberto; Mondello Antonino
11379024	Systems and methods capable of bypassing non-volatile memory when storing  firmware in execution memory	Agrawal Shalu; Yadav Ashok Kumar; Vasu Shaileshkumar; Desai Vismay  Ajaykumar
11379032	Power management integrated circuit with in situ non-volatile  programmability	Rowley Matthew David
11379122	Selective relocation of data of a subset of a data block based on  distribution of reliability statistics	Malshe Ashutosh; Muchherla Kishore Kumar; Rayaprolu Vamsi Pavan; Singidi  Harish R.
11379124	Data lines updating for data generation	Bell Debra M.; Malihi Naveh
11379139	Multi-partitioning of memories	Caraccio Danilo; Confalonieri Emanuele; Tiziani Federico
11379153	Storage traffic pattern detection in memory devices	Porzio Luca; Izzi Roberto; Colella Nicola; Caraccio Danilo; Orlando  Alessandro
11379156	Write type indication command	Jeon Seungjune; Zhu Jiangli
11379158	Apparatuses and methods for configuring I/Os of memory for hybrid memory  modules	Prather Matthew A.
11379299	Semiconductor device with user defined operations and associated methods  and systems	Veches Anthony D.
11379304	Mitigating read disturb effects in memory devices	Cadloni Gerald L.; Ish Mark; Crowley James P.
11379355	Power-on-time based data relocation	Muchherla Kishore Kumar; Padilla Renato C.; Ratnam Sampath K.; Sharifi  Tehrani Saeed; Feeley Peter; Brandt Kevin R.
11379358	Unretiring memory device blocks	Brandt Kevin R
11379359	Selecting data transfer units associated with a data stream for garbage  collection	Bianco Antonio David; Williams Steven S.
11379365	Memory access bounds checking for a programmable atomic operator	Brewer Tony; Walker Dean E.; Baronne Chris
11379366	Memory devices having selectively-activated termination devices	Grunzke Terry
11379367	Enhancement for activation and deactivation of memory address regions	Colella Nicola; Pollio Antonino; Tan Hua
11379373	Memory tiering using PCIe connected far memory	Ray Anirban; Stonelake Paul; Mittal Samir; Anand Gurpreet
11379376	Embedding data in address streams	Roberts David Andrew
11379401	Deferred communications over a synchronous interface	Walker Dean E.; Brewer Tony
11379402	Secondary device detection using a synchronous interface	Walker Dean E.; Brewer Tony
11380370	Semiconductor device having a charge pump	Wu Jun; Pan Dong
11380372	Transferring data between DRAM and SRAM	Finkbeiner Timothy P.; Manning Troy A.; Larsen Troy D.; Hush Glen E.
11380376	Apparatuses and methods to perform low latency access of a memory	He Yuan; Toyama Daigo
11380381	Techniques and devices for canceling memory cell variations	Hattori Yasuko; Jamali Mahdi
11380382	Refresh logic circuit layout having aggressor detector circuit sampling  circuit and row hammer refresh control circuit	Zhang Yu; Li Liang; Wu Jun
11380387	Multiplexor for a semiconductor device	He Yuan; Kim Tae H.
11380388	Memory arrays with vertical thin film transistors coupled between digit  lines	Derner Scott J.; Ingalls Charles L.
11380391	Neural network memory with mechanism to change synaptic weight	Boniardi Mattia; Tortorelli Innocenzo
11380394	Voltage profile for reduction of read disturb in memory cells	Cui Mingdong; Wang Hongmei; Ishac Michel Ibrahim
11380395	Access command delay using delay locked loop (DLL) circuitry	Brown Jason M.; Vankayala Vijayakrishna J.
11380397	Architecture for 3-D NAND memory	Morooka Midori; Tanaka Tomoharu
11380401	High-voltage shifter with reduced transistor degradation	Yamada Shigekazu
11380408	Selective overdrive of supply voltage to primary switch for programming  memory cells	Piccardi Michele
11380411	Threshold voltage drift tracking systems and methods	Giduturi Hari
11380414	TSV auto repair scheme on stacked die	Nishioka Naohisa
11380419	Methods to limit power during stress test and other limited supplies  environment	Parry Jonathan Scott; He Deping; Cariello Giuseppe
11380665	Semiconductor dice assemblies, packages and systems, and methods of  operation	Nakano Eiichi; Uchiyama Shiro
11380667	Memory device with a multiplexed command/address bus	Lendvay William A.
11380669	Methods of forming microelectronic devices	Parekh Kunal R.
11380696	Plate node configurations and operations for a memory array	Vimercati Daniele
11380699	Memory array and methods used in forming a memory array	Tran Luan C.; Huang Guangyu; Liu Haitao
11380705	Integrated assemblies, and methods of forming integrated assemblies	Shamanna Vinayak; Xu Lifang; Wilson Aaron R.
11380732	Memory with optimized resistive layers	Wei Lei; Zheng Pengyuan; Baker Kevin Lee; Ege Efe Sinan; Barton Adam  Thomas; Venigalla Rajasekhar
11381432	Multiplexing distinct signals on a single pin of a memory device	Hasbun Robert Nasry; Hollis Timothy M.; Wright Jeffrey P.; Gans Dean D.
11381752	Method and apparatus providing pixel array having automatic light control  pixels and image capture pixels	Moholt Jorgen
11385071	Providing a route with augmented reality	Chhabra Bhumika; Viswanathan Radhika; Christensen Carla L.;  Hosseinimakarem Zahra
11385281	Heat spreaders for use in semiconductor device testing, such as burn-in  testing	Qu Xiaopeng; Griffin Amy R.; Chun Hyunsuk
11385618	Process control device in manufacturing	Simsek-Ege Fatma Arzum; Vadivel Shruthi Kumara; Verma Deepti; Sharma  Anshika; Sriram Lavanya; Gawai Trupti D.
11385797	Solid state storage device with variable logical capacity based on memory  lifecycle	Reimers Niels
11385819	Separate partition for buffer and snapshot memory	Muchherla Kishore K.; Righetti Niccolo'; McNeil, Jr. Jeffrey S.; Goda  Akira; Marquart Todd A.; Helm Mark A.; Golov Gil; Binfet Jeremy; Miccoli  Carmine; Puzzilli Giuseppina
11385820	Command batching for a memory sub-system	Traver John Paul; Li Yun; Virani Scheheresade; Zhao Ning; Geukens Tom  Victor Maria
11385836	Read look ahead data size determination	Steinmetz Cory M.
11385838	Host accelerated operations in managed NAND devices	Jean Sebastien Andre
11385949	Apparatus having a multiplexer for passive input/output expansion	Rajgopal Suresh; Soto Dan E.; Eskildsen Steven
11385961	Adaptive parity techniques for a memory device	Eno Justin; Melton William A.; Eilert Sean S.
11386003	Forwarding code word address	Pawlowski Joseph Thomas
11386004	Memory device interface and method	Keeth Brent; Fay Owen; Yoo Chan H.; Greeff Roy E.; Leslie Matthew B.
11386231	Methods of context-based mobile device feature control and mobile devices  employing the same	Limaye Aparna U.; Hamilton Lindsay; Christensen Carla L.; Forgy Cipriana;  Jones Brandi M.
11386939	Read data FIFO control circuit	Karashima Ryoki
11386940	Apparatuses and methods including multilevel command and address signals	Kim Kang-Yong
11386946	Apparatuses and methods for tracking row accesses	Ayyapureddi Sujeet; Morgan Donald M.
11386948	Multiplexors under an array of memory cells	He Yuan; Kim Tae H.
11386949	Apparatuses, systems, and methods for latch reset logic	Fujishiro Keisuke; Mochida Yoshifumi
11386954	Memory device and method for operating the same including setting a  recovery voltage	Sforzin Marco; Amato Paolo; Tortorelli Innocenzo
11386958	Methods and apparatuses including a string of memory cells having a first  select transistor coupled to a second select transistor	Sakui Koji
11386964	Systems and methods involving hardware-based reset of unresponsive memory  devices	Patel Vipul; Pekny Theodore
11386966	Access operations in capacitive sense NAND memory	Fukuzumi Yoshiaki; Fujiki Jun; Tanaka Shuji; Yoshida Masashi; Saito  Masanobu; Kamata Yoshihiko
11387243	Memory arrays comprising strings of memory cells and methods used in  forming a memory array comprising strings of memory cells	Hopkins John D.; Lomeli Nancy M.
11387245	Electronic devices including pillars in array regions and non-array  regions, and related systems and methods	Hossain S M Istiaque; Larsen Christopher J.; Chandolu Anilkumar; McKinsey  Wesley O.; John Tom J.; Dhayalan Arun Kumar; Rau Prakash Rau Mokhna
11387369	Semiconductor structure formation	Hu Shen; Liu Hung-Wei; Li Xiao; Xie Zhiqiang; Staller Corey; Hull Jeffery  B.; Khandekar Anish A.; Figura Thomas A.
11387836	Method for compensating electrical device variabilities in  configurable-output circuit and device	Garofalo Pierguido
11387976	Full duplex device-to-device cooperative communication	Luo Fa-Long; Schmitz Tamara; Chritz Jeremy; Cummins Jaime
11387983	Secure medical apparatus communication	Mondello Antonino; Troia Alberto
11388032	Apparatuses and methods for pre-emphasis control	Arai Tetsuya; Yokobe Chihoko; Chen Guangcan
11392292	Maintenance operations for memory devices	Chen Ning; Zhu Jiangli; Zhu Fangfang; Tai Ying Yu
11392299	Multi-purpose signaling for a memory system	Johnson James Brian; Keeth Brent
11392300	Memory device having a secure test mode entry	Troia Alberto; Mondello Antonino
11392312	Read calibration based on ranges of program/erase cycles	Rayaprolu Vamsi Pavan; Puzzilli Giuseppina; Schuh Karl D.; McNeil, Jr.  Jeffrey S.; Muchherla Kishore K.; Malshe Ashutosh; Righetti  Niccolo′
11392328	Dynamic background scan optimization in a memory sub-system	Cadloni Gerald L.; Sheperek Michael; Chew Francis; Liikanen Bruce A.;  Koudele Larry J.
11392448	Payload parity protection for a synchronous interface	Walker Dean E.; Brewer Tony
11392451	Methods and system with dynamic ECC voltage and frequency	Parry Jonathan Scott; Grosz Nadav; Palmer David Aaron; Gyllenskog  Christian M.
11392468	Storing memory array operational information in non-volatile subarrays	Kawamura Christopher John; Derner Scott James; Ingalls Charles L.
11392505	Rebuilding logical-to-physical address mapping with limited memory	Wei Meng
11392515	Cache architecture for a storage device	Minopoli Dionisio; Balluchi Daniele
11392526	Memory system with selectively interfaceable memory subsystem	Liang Qing; Lu Yang
11392527	Ordered delivery of data packets based on type of path information in  each packet	Brewer Tony; Patrick David
11392547	Using prefix-delete operations for data containers	Jacob Jacob Mulamootil; Boles David; Ramdasi Gaurav Sanjay
11392796	Feature dictionary for bandwidth enhancement	Curewitz Kenneth Marion; Akel Ameen D.; Wang Hongyu; Eilert Sean Stephen
11393315	Hazard indicator	Barkam Swetha; Chhabra Bhumika; Russo Kathryn H.; Zhao Zhao
11393510	Encoding data attributes by data stream identifiers	Suhler Paul A.; Kaul Ram Krishan; Danielson Michael B.
11393511	Limiting regulator overshoot during power up	Xu Fei; Pan Dong; Chu Wei Lu
11393513	Timing of read and write operations to reduce interference, and related  devices, systems, and methods	Stave Eric J.
11393530	Memory cells, memory cell programming methods, memory cell reading  methods, memory cell operating methods, and memory devices	Liu Jun
11393531	Apparatuses and methods for comparing data patterns in memory	Manning Troy A.
11393533	Estimating resistance-capacitance time constant of electrical circuit	Zhan Huanyou; Rossini Massimo; Xu Jun
11393534	Adjustment of a starting voltage corresponding to a program operation in  a memory sub-system	Liikanen Bruce A.; Sheperek Michael; Koudele Larry J.
11393541	Mitigating a voltage condition of a memory cell in a memory sub-system	Rayaprolu Vamsi Pavan; Muchherla Kishore Kumar; Feeley Peter; Ratnam  Sampath K.; Parthasarathy Sivagnanam; Lin Qisong; Nowell Shane; Kaynak  Mustafa N.
11393542	Reduced-voltage operation of a memory device	Hartz Ezra E.; Patel Vipul
11393543	Methods for detecting and mitigating memory media degradation and memory  devices employing the same	Parry Jonathan S.; Raad George B.; Rehmeyer James S.; Cowles Timothy B.
11393548	Workload adaptive scans for memory sub-systems	Padilla Renato C.; Ratnam Sampath K.; Smitchger Christopher M.; Rayaprolu  Vamsi Pavan; Besinga Gary F.; Miller Michael G.; Opastrakoon Tawalin
11393672	Methods of forming microelectronic devices including an interdeck region  between deck structures	Hopkins John D.; Fazil Damir
11393687	Semiconductor devices including two-dimensional material structures	Meade Roy E.; Pandey Sumeet C.
11393688	Semiconductor contact formation	Imonigie Jerome A.; Yang Guangjun; Khandekar Anish A.; Nakamura  Yoshitaka; Lee Yi Fang
11393716	Devices including stair step structures, and related apparatuses and  memory devices	Ha Chang Wan; Wolstenholme Graham R.; Thimmegowda Deepak
11393720	Die corner protection by using polymer deposition technology	Yang Po Chih
11393748	Stack of horizontally extending and vertically overlapping features,  methods of forming circuitry components, and methods of forming an array of  memory cells	Tang Sanh D.; Lindsay Roger W.; Parat Krishna K.
11393756	Methods of forming microelectronic devices, and related microelectronic  devices, memory devices, and electronic systems	Greenlee Jordan D.; Emor Christian George; Fumagalli Luca; Hopkins John  D.; Klein Rita J.; Petz Christopher W.; McTeer Everett A.
11393790	Memory with TSV health monitor circuitry	Hiscock Dale H.; Pearson Evan C.; Gentry John H.; Scott Michael J.;  Gatlin Greg S.; Matthews Lael H.; Geidl Anthony M.; Roth Michael; Geiger  Markus H.
11393791	Three-dimensional stacking semiconductor assemblies with near zero bond  line thickness	Fay Owen R.
11393794	Microelectronic device assemblies and packages including surface mount  components	Richards Randon K.; Fay Owen R.; Limaye Aparna U.; Lim Dong Soon
11393820	Vertical digit line for semiconductor devices	Lee Si-Woo; Hwang Sangmin
11393822	Thin film transistor deck selection in a memory device	Vimercati Daniele
11393828	Electronic devices comprising digit line contacts and related systems and  methods	Kobayashi Naoyoshi; Fujita Osamu; Koge Katsumi
11393835	Memory arrays comprising strings of memory cells and methods used in  forming a memory array comprising strings of memory cells	Hopkins John D.; Lomeli Nancy M.
11393843	Charge trap structure with barrier to blocking region	Carlson Chris M.
11393845	Microelectronic devices, and related memory devices and electronic  systems	Kawai Koichi; Kamata Yoshihiko; Fukuzumi Yoshiaki; Murakoshi Tamotsu
11393872	Electronic devices with seed and magnetic regions and methods of  fabrication	Kula Witold; Kinney Wayne I.; Sandhu Gurtej S.
11393908	Methods of forming a microelectronic device, and related microelectronic  devices, memory devices, and electronic systems	Suresha Sandeep Ramasamudra; McDaniel Terrence B.
11393920	Integrated assemblies and methods of forming integrated assemblies	Hwang David K.; Kaeding John F.; Hill Richard J.; Sills Scott E.
11393928	Access devices formed with conductive contacts	Liu Haitao; Gao Yunfei; Karda Kamal M.; Pandey Deepak Chandra; Tang Sanh  D.; Yang Litao
11393978	Array of cross point memory cells	Sills Scott E.; Ramaswamy Durai Vishak Nirmal; Calderoni Alessandro
11394403	Error correction based on rate adaptive low density parity check (LDPC)  codes with flexible column weights in the parity check matrices	En Gad Eyal; Parthasarathy Sivagnanam; Chen Zhengang; Kaynak Mustafa N.;  Weinberg Yoav
11394589	Techniques for communicating multi-level signals	Mayer Peter; Umeda Nobuyuki; Salobrena Garcia Casto; Raj Rethin;  Schneider Andreas
11397461	Providing energy information to memory	Blodgett Greg; Balluchi Daniele; Caraccio Danilo; Mirichigni Graziano
11397526	Media type selection for image data	Hosseinimakarem Zahra; Chhabra Bhumika; Christensen Carla L.
11397631	Automated power down based on state of firmware	Parry Jonathan Scott; Grosz Nadav
11397638	Memory controller implemented error correction code memory	Hornung Bryan; Brewer Tony
11397640	Extended error correction in storage device	Palmer David Aaron
11397642	Shared parity protection	Parry Jonathan Scott; Cariello Giuseppe
11397654	Client-assisted phase-based media scrubbing	Bradshaw Samuel E.; Eno Justin
11397657	Managing memory objects that are assigned a respective designation	Basu Reshmi; Murphy Richard C.
11397679	Variable modulation scheme for memory device access or operation	Hasbun Robert Nasry; Hollis Timothy M.; Wright Jeffrey P.; Gans Dean D.
11397683	Low latency cache for non-volatile memory in a hybrid DIMM	Simionescu Horia C.; Stonelake Paul; Chin Chung Kuang; Kotte Narasimhulu  Dharanikumar; Walker Robert M.; Dirik Cagdas
11397688	Coherent memory access	Finkbeiner Timothy P.; Larsen Troy D.
11397694	Memory chip connecting a system on a chip and an accelerator chip	Eilert Sean S.; Curewitz Kenneth Marion; Eno Justin M.
11397695	Configurable memory termination	Kabir Mohammad Ehsan
11397814	Local ledger block chain for secure electronic control unit updates	Mondello Antonino; Troia Alberto
11398146	Emergency assistance response	Yao Chunhua; Vemparala Guruswamy Priya; Li Xiao; Forgy Cipriana; Sharma  Anshika
11398263	Semiconductor structures, memory cells and devices comprising  ferroelectric materials, systems including same, and related methods	Liao Albert; Kinney Wayne I.; Lee Yi Fang; Siddik Manzar
11398264	Methods and apparatus for dynamically adjusting performance of  partitioned memory	Harms Jonathan D.; Hulton David; Chritz Jeremy
11398265	Apparatuses and methods for analog row access tracking	Wu Jun; Li Liang; Zhang Yu; Pan Dong
11398266	Integrated assemblies having memory cells with capacitive units and  reference-voltage-generators with resistive units	Lee Hyunui; Suzuki Takamasa; Satoh Yasuo; He Yuan
11398276	Decoder architecture for memory device	Bedeschi Ferdinando; Koelling Jeffrey E.; Giduturi Hari; Muzzetto  Riccardo; Villa Corrado
11398282	Intelligent charge pump architecture for flash array	Troia Alberto; Mondello Antonino
11398427	Integrated assemblies and methods of forming integrated assemblies	Scarbrough Alyssa N.; Hopkins John D.
11398457	Packaged integrated circuit devices with through-body conductive vias,  and methods of making same	Jiang Tongbi; Chia Yong Poo
11398465	Proximity coupling interconnect packaging systems and methods	Fogal Rich; Fay Owen R.
11398468	Apparatus with voltage protection mechanism	Davis James E.; Furia Milind Nemchand; Chaine Michael D.; Smith Eric J.
11398486	Microelectronic devices with tier stacks with varied tier thicknesses,  and related methods and systems	Hopkins John D.; Lomeli Nancy M.
11398489	Memory array having connections going through control gates	Tanzawa Toru; Murakoshi Tamotsu; Thimmegowda Deepak
11398493	Arrays of memory cells including pairs of memory cells having respective  charge storage nodes between respective access lines	Pekny Theodore T.
11398498	Integrated assemblies and methods of forming integrated assemblies	Luo Shuangqiang; Chary Indra V.
11398571	Devices and electronic systems including vertical transistors, and  related methods	Ramaswamy Durai Vishak Nirmal; Sills Scott E.
11398599	Methods for forming memory devices, and associated devices and systems	Jeppson Michael B.
11398796	Temperature compensated oscillators and associated methods	Choi Jung-Hwa
11398815	Methods and apparatuses for temperature independent delay circuitry	Huang Zhiqi; Chu Weilu; Pan Dong
11398816	Apparatuses and methods for adjusting a phase mixer circuit	Satoh Yasuo
11398835	Managing defective bitline locations in a bit flipping decoder	Kaynak Mustafa N.; Parthasarathy Sivagnanam
11402426	Inductive testing probe apparatus for testing semiconductor die and  related systems and methods	Lindenberg Tony M.; Bossart Kurt J.; Hacker Jonathan S.; Tiwari Chandra  S.
11402590	Method of forming photonics structures	Sandhu Gurtej
11403013	Managed NVM adaptive cache management	Christensen Carla L.; Huang Jianmin; Jean Sebastien Andre; Tanpairoj  Kulachet
11403023	Method of organizing a programmable atomic unit instruction memory	Brewer Tony
11403032	Data transfer management within a memory device having multiple memory  regions with different memory densities	Alhussien Abdelhakim; Ozturk Ayberk; Schuh Karl D.; Bert Luca
11403035	Memory module including a controller and interfaces for communicating  with a host and another memory module	Walker Robert M.
11403042	Self adapting iterative read calibration to retrieve data from memory  cells	Alhussien AbdelHakim S.; Parthasarathy Sivagnanam; Fitzpatrick James;  Khayat Patrick Robert
11403067	Memory array data structure for posit operations	Ramesh Vijay S.
11403096	Acceleration circuitry for posit operations	Ramesh Vijay S.; Hays Phillip G.; Cutler Craig M.; Rees Andrew J.
11403107	Protection against timing-based security attacks by randomly adjusting  reorder buffer capacity	Wallach Steven Jeffrey
11403111	Reconfigurable processing-in-memory logic using look-up tables	Yudanov Dmitri
11403169	Data recovery system for memory devices	Fackenthal Richard Edward; Eilert Sean S.
11403195	Application of dynamic trim strategy in a die-protection memory  sub-system	Xie Tingjun; Kwong Charles See Yeung
11403216	Scaling factors for media management operations at a memory device	Chen Mikai; Shen Zhenlei; Lang Murong; Zhou Zhenming
11403226	Cache with set associativity having data defined cache sets	Wallach Steven Jeffrey
11403228	Memory device page program sequence	Tanpairoj Kulachet; Huang Jianmin; Ogura Iwasaki Tomoko; Muchherla  Kishore Kumar; Feeley Peter Sean
11403238	Configurable data path for memory modules	Kinsley Thomas H.
11403240	Memory having internal processors and data communication methods in  memory	Walker Robert M.; Skinner Dan; Merritt Todd A.; Pawlowski J. Thomas
11403241	Communicating data with stacked memory dies	Hasbun Robert Nasry; Hollis Timothy M.; Wright Jeffrey P.; Gans Dean D.
11403256	Conditional operations in a vector processor having true and false vector  index registers	Wallach Steven Jeffrey
11403473	Systems and methods to determine kinematical parameters	Tuttle John R.
11404092	Cross point array memory in a non-volatile dual in-line memory module	McGlaughlin Edward; Tai Ying Yu; Mittal Samir
11404095	Reduced pin status register	Cariello Giuseppe
11404108	Copy data in a memory system with artificial intelligence mode	Troia Alberto
11404109	Logical operations using memory cells	Manning Troy A.; Hush Glen E.
11404111	Sensing techniques using a charge transfer device	Raad George B.; Schreck John F.
11404116	Data storage based on data polarity	Schreck John F.; Raad George B.
11404117	Self-selecting memory array with horizontal access lines	Fratin Lorenzo; Pellizzer Fabio; Pirovano Agostino; Meyer Russell L.
11404120	Refresh operation of a memory cell	Sinipete Joemar; Sancon John Christopher; Cui Mingdong
11404124	Voltage bin boundary calibration at memory device power up	Sheperek Michael; Liikanen Bruce A.; Kientz Steve
11404125	Memory cell programming applying a programming pulse having different  voltage levels	Yip Aaron S.
11404129	Power architecture for non-volatile memory	Lin Qisong; Xu Shuai; Parry Jonathan S.; Binfet Jeremy; Piccardi Michele;  Liang Qing
11404130	Evaluation of background leakage to select write voltage in memory  devices	Gajera Nevil N.; Sarpatwari Karthik; Lu Zhongyuan
11404131	Decision for executing full-memory refresh during memory sub-system  power-on stage	Xie Tingjun; Shen Zhenlei; Zhou Zhenming
11404133	Valid translation unit count-based memory management	Malshe Ashutosh; Rayaprolu Vamsi Pavan; Muchherla Kishore K.
11404136	Memory device protection using interleaved multibit symbols	Amato Paolo; Sforzin Marco; Pawlowski Stephen S.
11404139	Smart sampling for block family scan	Rayaprolu Vamsi Pavan; Nowell Shane; Sheperek Michael; Kientz Steven  Michael
11404141	Preemptive read refresh in memories with time-varying error rates	Xie Tingjun; Chen Zhengang
11404217	Methods of incorporating leaker devices into capacitor configurations to  reduce cell disturb, and capacitor configurations incorporating leaker  devices	Chavan Ashonita A.; Cook Beth R.; Nahar Manuj; Ramaswamy Durai Vishak  Nirmal
11404264	Silicon doping for laser splash blockage	Espina Angelo Oria
11404267	Semiconductor structure formation	Sarkar Santanu; Imonigie Jerome A.; Zhuang Kent H.; Jebaraj Johnley  Muthuraj Josiah; Fucsko Janos; Greenwood Benjamin E.; Good Farrell M.
11404289	Semiconductor device assembly with graded modulus underfill and  associated methods and systems	Lee Jungbae; Wang Chih Hong
11404390	Semiconductor device assembly with sacrificial pillars and methods of  manufacturing sacrificial pillars	Wang Chao Wen
11404436	Memory arrays comprising strings of memory cells and methods used in  forming a memory array comprising strings of memory cells	Greenlee Jordan D.; Hopkins John D.
11404440	Memory arrays	Tang Sanh D.; Hill Richard J.; Lee Yi Fang; Roberts Martin C.
11404463	Color filter array, imagers and systems having same, and methods of  fabrication and use thereof	Ford Loriston; Boettiger Ulrich C.
11404479	Memory including a selector switch on a variable resistance memory cell	Redaelli Andrea; Pirovano Agostino
11404571	Methods of forming NAND memory arrays	Carlson Chris M.; Liu Hung-Wei; Li Jie; Pavlopoulos Dimitrios
11404583	Apparatus including multiple channel materials, and related methods,  memory devices, and electronic systems	Goda Akira; Aoulaiche Marc
11404637	Tapered cell profile and fabrication	Redaelli Andrea; Conti Anna Maria; Pirovano Agostino
11405058	Stopping criteria for layered iterative error correction	Kaynak Mustafa N.; Radke William H.; Khayat Patrick R.; Parthasarathy  Sivagnanam
11405076	Apparatuses and methods for adaptive spatial diversity in a MIMO-based  system	Luo Fa-Long; Chritz Jeremy; Schmitz Tamara; Cummins Jaime
11405579	Removable storage device with a virtual camera for video surveillance as  a service	Kale Poorna; Lin Te-Chang
11408935	JTAG registers with concurrent inputs	Mondello Antonino; Troia Alberto
11409348	Power backup architecture to manage capacitor health	Suljic Vehid; Rowley Matthew D.
11409354	Multi-voltage operation for driving a multi-mode channel	Brox Martin; Hein Thomas
11409436	Buffer management in memory systems for read and write requests	Bavishi Dhawal; Meyerowitz Trevor Conrad
11409450	Channel architecture for memory devices	Basu Reshmi
11409461	Extending size of memory unit	Subbarao Sanjay
11409462	Data removal marking in a memory device	Li Huachen; Zhang Xu; Li Zhong Xian; Duan Xinghui; Wang Xing; Liang Tian
11409533	Pipeline merging in a circuit	Grassi Michael
11409539	On-demand programmable atomic kernel loading	Walker Dean E.; Brewer Tony; Baronne Chris
11409562	Class-based dynamic memory slot allocation	Ou Michael; Liu Hao
11409595	Channel modulation for a memory device	Brox Martin; Mayer Peter; Spirkl Wolfgang Anton; Hein Thomas; Richter  Michael Dieter; Hollis Timothy M.; Greeff Roy E.
11409599	Managing probabilistic data integrity scans in workloads with localized  read patterns	Sharifi Tehrani Saeed
11409600	Increased memory access parallelism using parity	Liang Qing
11409601	Memory device protection	Brewer Tony M.; Keeth Brent
11409651	Host accelerated operations in managed NAND devices	Jean Sebastien Andre; Blodgett Greg A.
11409654	Intelligent optimization of caching operations in a data storage device	Bielby Robert Richard Noel; Kale Poorna
11409657	Adaptive address tracking	Roberts David Andrew
11409661	Logical-to-physical mapping	Luo Xiangang; Huang Jianmin
11409674	Memory with improved command/address bus utilization	Bell Debra M.; Johnson Vaughn N.; Alexander Kyle; Howe Gary L.; Pecha  Brian T.; Wiscombe Miles S.
11409753	Reducing probabilistic filter query latency	Boles David; Groves John M.; Moyer Steven; Tomlinson Alexander
11410475	Autonomous vehicle data recorders	Golov Gil
11410713	Apparatuses and methods for detecting illegal commands and command  sequences	Wu Di; Bell Debra M.; Veches Anthony D.; Rehmeyer James S.; Wang Libo
11410715	Apparatus with refresh management mechanism	Meier Nathaniel J.; Rehmeyer James S.; Brown David R.
11410717	Apparatuses and methods for in-memory operations	Lea Perry V.; Murphy Richard C.
11410718	Systems and methods for common gate input buffers	Kang Shin Deok
11410726	Integrated circuit devices for driving conductors to target voltage  levels	Piccardi Michele; Guo Xiaojiang
11410730	I/O buffer offset mitigation while applying a same voltage level to two  inputs of an input buffer	Tang Qiang; Ghodsi Ramin
11410734	Voltage bin selection for blocks of a memory device after power up of the  memory device	Muchherla Kishore Kumar; Ratnam Sampath K; Nowell Shane; Parthasarathy  Sivagnanam; Kaynak Mustafa N; Schuh Karl D; Feeley Peter; Wu Jiangang
11410737	Power regulation for memory systems	Choi Baekkyu; Badrieh Fuad; Kinsley Thomas H.
11410742	Microelectronic device testing, and related devices, systems, and methods	Fujiwara Yoshinori
11410743	Self-adaptive read voltage adjustment using directional error statistics  for memories with time-varying error rates	Xie Tingjun; Chen Zhengang
11410949	Memory devices with backside bond pads under a memory array	Lee Eric N.; Goda Akira
11410961	Methods and apparatus for temperature modification in bonding stacked  microelectronic components and related substrates and assemblies	Bayless Andrew M.; Wirz Brandon P.
11410962	Methods and systems for manufacturing semiconductor devices	Zhou Wei; Street Bret K.; McClain Benjamin L.; Tuttle Mark E.
11410963	Methods and systems for manufacturing semiconductor devices	Zhou Wei; Street Bret K.; McClain Benjamin L.; Tuttle Mark E.
11410964	Contaminant control in thermocompression bonding of semiconductors and  associated systems and methods	Wirz Brandon P.; Song Jaekyu; Huang Sui Chi
11410969	Semiconductor device assemblies including multiple stacks of different  semiconductor dies	Thurgood Blaine J.
11410973	Microelectronic device assemblies and packages and related methods and  systems	Fay Owen R.; Richards Randon K.; Limaye Aparna U.; Lim Dong Soon; Yoo  Chan H.; Street Bret K.; Nakano Eiichi; Luo Shijian
11410980	Integrated assemblies comprising vertically-stacked decks	Juengling Werner
11410981	Graphics processing unit and high bandwidth memory integration using  integrated interface and silicon interposer	Yoo Chan H.; Fay Owen R.
11411002	Memory arrays comprising vertically-alternating tiers of insulative  material and memory cells and methods of forming a memory array	Ramaswamy Durai Vishak Nirmal
11411008	Integrated circuity, dram circuitry, methods used in forming integrated  circuitry, and methods used in forming DRAM circuitry	Sandhu Gurtej S.; Smythe John A.
11411012	Methods used in forming a memory array comprising strings of memory cells	Hopkins John D.
11411013	Microelectronic devices including stair step structures, and related  electronic devices and methods	Jhothiraman Jivaan Kishore; Shrotri Kunal; King Matthew J.
11411015	Memory arrays and methods used in forming a memory array	Howder Collin; Carter Chet E.
11411021	Integrated assemblies and methods of forming integrated assemblies	Greenlee Jordan D.; Hopkins John D.
11411085	Devices comprising floating gate materials, tier control gates, charge  blocking materials, and channel materials	Hopkins John D.
11411118	Integrated assemblies	Pulugurtha Srinivas; Yang Litao; Liu Haitao; Karda Kamal M.
11411139	Textured optoelectronic devices and associated methods of manufacture	Xu Lifang; Schellhammer Scott D.; Mou Shan Ming; Bernhardt Michael J.
11412032	Sharing a memory resource among physically remote entities	Boehm Aaron P.
11412075	Multiple protocol header processing	Patrick David; Brewer Tony
11416048	Using a thermoelectric component to improve memory sub-system performance	Spica Michael R.
11416143	Runtime selection of memory devices and storage devices in a  disaggregated memory system	Basu Reshmi; Murphy Richard C.
11416154	Partially written block treatment	Parthasarathy Sivagnanam; Grunzke Terry M.; Botticchio Lucia; Di  Francesco Walter; Indavarapu Vamshi K.; Valeri Gianfranco; Padilla Renato C.;  Mohammadzadeh Ali; Hoei Jung Sheng; De Santis Luca
11416164	Time indicator of super block operations	Brandt Kevin R.
11416173	Memory system with dynamic calibration using a variable adjustment  mechanism	Sheperek Michael; Koudele Larry J.; Kientz Steve
11416177	Memory sub-system storage mode control	Pratt Thomas
11416217	Split and duplicate ripple circuits	Morgan Donald Martin
11416250	Method and apparatus in memory for input and output parameters  optimization in a memory system during operation	Durai Elancheren
11416331	Modified checksum using a poison data pattern	Brewer Tony M.; Hornung Bryan D.
11416333	Semiconductor device with power-saving mode and associated methods and  systems	Lam Boon Hor; Major Karl L.; Ho Loon Ming; Montierth Dennis G.
11416388	Memory sub-system logical block address remapping	Muchherla Kishore K.; Rayaprolu Vamsi Pavan; Schuh Karl D.; Wu Jiangang;  Golov Gil
11416389	Managing garbage collection in a memory subsystem based on  characteristics of data streams	Akin William; Bahirat Shirish D.
11416391	Garbage collection	Muchherla Kishore K.; Ratnam Sampath K.; Feeley Peter; Miller Michael G.;  Hubbard Daniel J.; Padilla Renato C.; Malshe Ashutosh; Singidi Harish R.
11416393	Efficient scrambling and encoding for copyback procedures using  precomputed values	Eisenhuth Robert B.; Parry Jonathan S.
11416395	Memory virtualization for accessing heterogeneous memory components	Ray Anirban; Maharana Parag R.; Anand Gurpreet
11416420	Secure memory system programming	Duval Olivier
11416422	Memory chip having an integrated data mover	Bradshaw Samuel E.; Swami Shivam; Eilert Sean S.; Eno Justin M.; Akel  Ameen D.
11416437	Memory devices, modules and systems having memory devices with varying  physical dimensions, memory formats, and operational capabilities	Kinsley Thomas H.; Pax George E.; Hollis Timothy M.; Sharma Yogesh;  Richards Randon K.; Yoo Chan H.; King Gregory A.; Stave Eric J.
11416621	Authenticating software images	Duval Olivier
11416735	Neural networks and systems for decoding encoded data	Luo Fa-Long; Cummins Jaime; Schmitz Tamara
11417031	Highlighting a tagged object with augmented reality	Chhabra Bhumika; Viswanathan Radhika; Christensen Carla L.;  Hosseinimakarem Zahra
11417368	Memory devices including heaters	Iwasaki Tomoko Ogura; Koushan Foroozan; Nayar Jayasree; Shin Ji-Hye Gale
11417372	Interface protocol configuration for memory	Murphy Richard C.; Hush Glen E.; Sun Honglin
11417373	Neuromorphic computing devices and methods	Kale Poorna; Gattani Amit
11417374	Reset speed modulation circuitry for a decision feedback equalizer of a  memory device	Waldrop William Chad; Howe Gary L.
11417375	Discharge current mitigation in a memory array	Wang Hongmei; Son Jin Seung; Ghetti Andrea
11417380	Dual mode ferroelectric memory cell operation	Vimercati Daniele
11417381	Memory device having shared read/write access line for 2-transistor  vertical memory cell	Sarpatwari Karthik; Karda Kamal M.; Ramaswamy Durai Vishak Nirmal
11417382	Apparatuses and methods for skipping wordline activation of defective  memory during refresh operations	Arai Minari
11417383	Apparatuses and methods for dynamic refresh allocation	Jenkinson Matthew D.; Meier Nathaniel J.; Montierth Dennis G.
11417384	Apparatuses and methods for control of refresh operations	Du Bin; Li Liang
11417387	Reserved rows for row-copy operations for semiconductor memory devices  and associated methods and systems	Rooney Randall J.
11417388	Processing of unassigned row address in a memory	Miyamoto Takayuki; Yamanaka Satoshi
11417389	Layouts for sense amplifiers and related apparatuses and systems	Watanabe Yuko; Shirako Takefumi
11417391	Systems and methods for level down shifting drivers	Kim Tae H.
11417394	Decoding for a memory device	Fratin Lorenzo; Fantini Paolo; Pellizzer Fabio; Graettinger Thomas M.
11417396	Sequential voltage ramp-down of access lines of non-volatile memory  device	Fayrushin Albert; Benvenuti Augusto; Goda Akira; Laurin Luca; Liu Haitao
11417398	Memory cells for storing operational data	Boniardi Mattia; Conti Anna Maria; Tortorelli Innocenzo
11417405	Scan optimization from stacking multiple reliability specifications	Vashi Ankit Vinod; Singidi Harish Reddy; Muchherla Kishore Kumar
11417406	Reducing program verifies for multi-level NAND cells	McNeil Jeffrey S.; Nevill Jason Lee; Vali Tommaso
11417411	Systems and methods for power savings in row repaired memory	Rehmeyer James S.; Fujiwara Yoshinori
11417565	Methods of forming high aspect ratio openings and methods of forming high  aspect ratio features	Tokashiki Ken; Smythe John A.; Sandhu Gurtej S.
11417661	Integrated assemblies comprising stud-type capacitors	Sandhu Gurtej S.; Rocklein Matthew N.; Busch Brett W.
11417671	Memory device including pass transistors in memory tiers	Tanzawa Toru
11417673	Microelectronic devices including stair step structures, and related  memory devices, electronic systems, and methods	Luo Shuangqiang; Chary Indra V.; Dorhout Justin B.
11417676	Methods of forming microelectronic devices and memory devices, and  related microelectronic devices, memory devices, and electronic systems	Meotto Umberto Maria; Camerlenghi Emilio; Tessariol Paolo; Laurin Luca
11417681	Memory arrays and methods used in forming a memory array comprising  strings of memory cells and operative through-array-vias	Hu Yi; Carlson Merri L.; Chandolu Anilkumar; Chary Indra V.; Daycock  David; Jain Harsh Narendrakumar; King Matthew J.; Li Jian; Lowe Brett D.; Rau  Prakash Rau Mokhna; Xu Lifang
11417682	Integrated assemblies having vertically-spaced channel material segments,  and methods of forming integrated assemblies	Hopkins John D.; Surthi Shyam; Greenlee Jordan D.
11417730	Vertical transistors with channel region having vertically elongated  crystal grains that individually are directly against both of the top and  bottom source/drain regions	Nahar Manuj; Antonov Vassil N.; Karda Kamal M.; Mutch Michael; Liu  Hung-Wei; Hull Jeffery B.
11417840	Protective sealant for chalcogenide material and methods for forming the  same	Good Farrell M.; Grubbs Robert K.; Lugani Gurpreet S.
11417841	Techniques for forming self-aligned memory structures	Russell Stephen W.; Redaelli Andrea; Tortorelli Innocenzo; Pirovano  Agostino; Pellizzer Fabio; Fratin Lorenzo
11418353	Security descriptor generation	Duval Olivier
11418370	Time-variable decision feedback equalization	Hollis Timothy M.
11418455	Transparent packet splitting and recombining	Brewer Tony
11419239	Thermal management of circuit boards	Qu Xiaopeng; Chun Hyunsuk
11422577	Output reference voltage	Cai Liuchun
11422705	Non-deterministic memory protocol	Walker Robert M.; Hall, Jr. James A.; Ross Frank F.
11422713	Memory error indicator for high-reliability applications	Prosser Erika; Boehm Aaron P.; Bell Debra M.
11422720	Apparatuses and methods to change data category values	Willcock Jeremiah J.
11422745	Addressing zone namespace and non-zoned memory based on data  characteristics	Bert Luca
11422748	Writing and querying operations in content addressable memory systems  with content addressable memory buffers	Akel Ameen D.; Eilert Sean S.
11422820	Shadow cache for securing conditional speculative instruction execution	Wallach Steven Jeffrey
11422826	Operational code storage for an on-die microprocessor	Manning Troy A.; Harms Jonathan D.; Larsen Troy D.; Hush Glen E.;  Finkbeiner Timothy P.
11422883	Generating parity data based on a characteristic of a stream of data	Bahirat Shirish; Kulkarni Aditi P.
11422884	Spare substitution in memory system	Pawlowski Joseph Thomas
11422885	Tiered error correction code (ECC) operations in memory	Kaynak Mustafa N.; Khayat Patrick R.; Parthasarathy Sivagnanam
11422887	Techniques for non-deterministic operation of a stacked memory system	Pawlowski Joseph T.
11422929	Memory devices and methods which may facilitate tensor memory access	Luo Fa-Long; Cummins Jaime; Schmitz Tamara; Chritz Jeremy
11422933	Data storage layout	Wheeler Kyle B.; Finkbeiner Timothy P.
11422934	Adaptive address tracking	Roberts David Andrew
11422945	Generating, maintaining, or utilizing a compressed logical-to-physical  table based on sequential writes	Palmer David A.
11423154	Endpoint authentication based on boot-time binding of multiple components	Duval Olivier
11423953	Command triggered power gating for a memory device	Akamatsu Hiroshi; Cho Kwang-Ho
11423964	Memory device having an enhanced ESD protection and a secure access from  a testing machine	Troia Alberto; Mondello Antonino
11423972	Integrated assemblies	Li Jiyun; He Yuan
11423973	Contemporaneous sense amplifier timings for operations at internal and  edge memory array mats	He Yuan
11423976	Memory array reset read operation	Binfet Jeremy; Helm Mark; Filipiak William; Hawes Mark
11423981	Decoding for a memory device	Fantini Paolo; Fratin Lorenzo; Pellizzer Fabio
11423988	Programming techniques for polarity-based memory cells	Tortorelli Innocenzo; Boniardi Mattia; Robustelli Mattia
11423989	Generating embedded data in memory cells in a memory sub-system	Liikanen Bruce A.; Sheperek Michael; Koudele Larry J.
11423990	Multi-stage erase operation for a memory device	Koushan Foroozan S.; Sato Shinji
11424001	Apparatuses, systems, and methods for error correction	Fujishiro Keisuke; Mochida Yoshifumi
11424005	Apparatuses and methods for adjusting victim data	Penney Daniel B.; Brown Jason M.
11424118	Electronic devices comprising silicon carbide materials	Sarkar Santanu; Good Farrell M.
11424169	Memory device including circuitry under bond pads	Cerafogli Chiara; Marr Kenneth William; Soderling Brian J.; Violette  Michael P.; Tomayer Joshua Daniel; Davis James E.
11424184	Methods of forming microelectronic devices, and related microelectronic  devices, memory devices, and electronic systems	Luo Shuangqiang; Chary Indra V.
11424241	Devices, memory devices, and methods of forming devices	Sills Scott E.; Beigel Kurt D.
11424256	Transistors, semiconductor constructions, and methods of forming  semiconductor constructions	Thimmegowda Deepak; Bicksler Andrew R.; Awusie Roland
11424262	Microelectronic devices including staircase structures, and related  memory devices and electronic systems	Luo Shuangqiang; Lomeli Nancy M.
11424267	Dielectric extensions in stacked memory arrays	Tessariol Paolo; Fukuzumi Yoshiaki
11424291	Array of cross point memory cells	Frost Denzil S.; Allen, III Tuman Earl
11424363	Programmable charge-storage transistor, an array of  elevationally-extending strings of memory cells, and a method of forming an  array of elevationally-extending strings of memory cells	Liu Haitao; Karda Kamal M.; Fayrushin Albert
11424764	Recurrent neural networks and systems for decoding encoded data	Luo Fa-Long
11425740	Method and device capable of executing instructions remotely in  accordance with multiple logic units	Luo Fa-Long; Hush Glen E.; Boehm Aaron P.
11425816	Card edge connector with intra-pair coupling	Stewart Daniel B.
11429284	Data categorization based on invalidation velocities	Bahirat Shirish D.; Haswell Jonathan M.; Akin William
11429291	Memory system and operations of the same	Gans Dean D.
11429292	Power management for a memory device	Kinsley Thomas H.; Choi Baekkyu; Badrieh Fuad
11429300	Independent parallel plane access in a multi-plane memory device	Pekney Theodore T.
11429309	Adjusting a parameter for a programming operation based on the  temperature of a memory system	Kaynak Mustafa N; Ratnam Sampath K; Loh Zixiang; Rao Nagendra Prasad  Ganesh; Koudele Larry K; Rayaprolu Vamsi Pavan; Khayat Patrick R; Nowell  Shane
11429445	User interface based page migration for performance enhancement	Yudanov Dmitri; Bradshaw Samuel E.
11429479	Memory device activity-based copying defect management data	Mylavarapu Sai Krishna
11429480	Method of demand scrubbing by placing corrected data in memory-side cache	Hornung Bryan; Patrick David
11429483	Read level edge find operations in a memory sub-system	Liikanen Bruce A.; Koudele Larry J.
11429504	Closing block family based on soft and hard closure criteria	Sheperek Michael; Koudele Larry J.; Williams Steven S.
11429521	Allocation of overprovisioned blocks for minimizing write amplification  in solid state drives	Bahirat Shirish D.; Akin William; Kulkarni Aditi P.
11429528	Split cache for address mapping data	Colella Nicola; Pollio Antonino
11429543	Managed NAND flash memory region control against endurance hacking	Golov Gil
11429544	Enabling devices with enhanced persistent memory region access	Steinmetz Joseph H.; Bert Luca; Akin William
11430489	Power management component for memory sub-system power cycling	Rowley Matthew D.
11430492	Apparatuses including multiple read modes and methods for same	Pekny Theodore T.
11430503	Semiconductor device performing implicit precharge operation	Sato Homare
11430504	Row clear features for memory devices and associated methods and systems	Wiscombe Miles S.; Smith Scott E.; Howe Gary L.; Huber Brian W.; Brewer  Tony M.
11430509	Varying-polarity read operations for polarity-written memory cells	Tortorelli Innocenzo; Giduturi Hari; Pellizzer Fabio
11430511	Comparing input data to stored data	Castro Hernan A.
11430518	Conditional drift cancellation operations in programming memory cells to  store data	Wang Hongmei; Cui Mingdong; Gajera Nevil N.
11430522	Programming of memory devices	Beltrami Silvia; Visconti Angelo
11430526	Interleaved two-pass data programming techniques with reduced write  amplification	Nguyen Phong Sy; Fitzpatrick James; Muchherla Kishore Kumar
11430528	Determining a read voltage based on a change in a read window	Rayaprolu Vamsi Pavan; Puzzilli Giuseppina; Schuh Karl D.; McNeil, Jr.  Jeffrey S.; Muchherla Kishore K.; Malshe Ashutosh; Righetti  Niccolo′
11430539	Modifiable repair solutions for a memory array	Manning Troy A.; Larsen Troy D.; Harms Jonathan D.; Hush Glen E.;  Finkbeiner Timothy P.
11430540	Defective memory unit screening in a memory system	Frolikov Alex
11430734	Methods of forming memory devices including stair step structures	Tessariol Paolo; Wolstenholme Graham R.; Yip Aaron
11430793	Microelectronic devices including passing word line structures, and  related electronic systems and methods	Pandey Deepak Chandra; Neelapala Venkata Naveen Kumar; Liu Haitao
11430798	Methods and apparatuses with vertical strings of memory cells and support  circuitry	Hasegawa Takehiro; Sakui Koji
11430809	Integrated assemblies, and methods of forming integrated assemblies	Hossain S. M. Istiaque; Mokhna Rau Prakash Rau; Dhayalan Arun Kumar;  Fazil Damir; Peterson Joel D.; Chandolu Anilkumar; Fayrushin Albert; Matamis  George; Larsen Christopher; Islam Rokibul
11430887	High voltage isolation devices for semiconductor devices	Smith Michael A.
11430888	Integrated assemblies having transistors configured for high-voltage  applications	Shafi Zia A.; Laurin Luca; Panda Durga P.; Vigano´ Sara
11430895	Transistors including oxide semiconductive materials, and related  microelectronic devices, memory devices, electronic systems, and methods	Karda Kamal M.; Huang Guangyu; Liu Haitao; Goda Akira
11430950	Low resistance via contacts in a memory device	Albini Giulio
11431355	Error correction code (ECC) operations in memory for providing redundant  error correction	Khayat Patrick R.; Parthasarathy Sivagnanam; Kaynak Mustafa N.
11431629	Data packet management	Vlasov Aleksei; Sharma Prateek; Weinberg Yoav; Virani Scheheresade;  Mallak Bridget L.
11431653	Packet arbitration for buffered packets in a network device	Brewer Tony; Pospesel Kirk D.; Grassi Michael
11433855	Intelligent detection and alerting of potential intruders	Bielby Robert Richard Noel; Kale Poorna
11435811	Memory device sensors	Bell Debra M.; Baghi Roya; Gove Erica M.; Hosseinimakarem Zahra;  O'Donnell Cheryl M.
11435900	Namespace size adjustment in non-volatile memory devices	Frolikov Alex
11435919	Associating multiple cursors with block family of memory device	Sheperek Michael; Liikanen Bruce A.; Feeley Peter; Koudele Larry J.;  Nowell Shane; Kientz Steven Michael
11435944	Dynamic memory address write policy translation based on performance  needs	Cariello Giuseppe; Parry Jonathan Scott
11435946	Intelligent wear leveling with reduced write-amplification for data  storage devices configured on autonomous vehicles	Bielby Robert Richard Noel; Kale Poorna
11436041	Customized root processes for groups of applications	Yudanov Dmitri; Bradshaw Samuel E.
11436071	Error control for content-addressable memory	Akel Ameen D.; Eilert Sean S.
11436076	Predictive management of failing portions in a data storage device	Kale Poorna; Bielby Robert Richard Noel
11436078	NAND parity information techniques for systems with limited RAM	Singidi Harish Reddy; Luo Xiangang; Huang Jianmin; Muchherla Kishore  Kumar; Malshe Ashutosh; Rayaprolu Vamsi Pavan; Ratnam Sampath
11436082	Internal error correction for memory devices	Boehm Aaron P.; Schaefer Scott E.
11436084	Semiconductor device having error correction code (ECC) circuit	Suzuki Takamasa
11436085	Dynamic over provisioning allocation for purposed blocks	Muchherla Kishore Kumar; Singidi Harish R.; Malshe Ashutosh; Rayaprolu  Vamsi Pavan; Ratnam Sampath K.
11436144	Cache memory addressing	Pawlowski Joseph Thomas; Cooper-Balis Elliott Clifford; Roberts David  Andrew
11436154	Logical block mapping based on an offset	Malshe Ashutosh; Schuh Karl D.
11436156	Memory access control through permissions specified in page table entries  for execution domains	Wallach Steven Jeffrey
11436167	Interface components between a controller and memory devices	Rowley Matthew D.; Castro Peter R.
11436169	Individually addressing memory devices disconnected from a data bus	Schaefer Scott E.; Prather Matthew A.
11436187	Method of notifying a process or programmable atomic operation traps	Brewer Tony
11436864	Driver recognition to control vehicle systems	Burk Michael Tex; Bielby Robert Richard Noel
11437079	Span mask generation	Tiwari Sanjay
11437086	Phase clock correction	Brox Martin; Kuzmenka Maksim
11437093	Methods for mitigating power loss events during operation of memory  devices and memory devices employing the same	Moschiano Violante; Smaniotto Andrea
11437097	Voltage equalization for pillars of a memory array	Villa Corrado; Bedeschi Ferdinando; Fantini Paolo
11437103	Memory cells configured to generate weighted inputs for neural networks	Minucci Umberto; Vali Tommaso; Irrera Fernanda; De Santis Luca
11437106	Capacitive sense NAND memory	Fukuzumi Yoshiaki; Fujiki Jun; Tanaka Shuji; Yoshida Masashi; Saito  Masanobu; Kamata Yoshihiko
11437108	Voltage bin calibration based on a temporary voltage shift offset	Muchherla Kishore Kumar; Schuh Karl; Kaynak Mustafa N; Luo Xiangang;  Nowell Shane; Batutis Devin; Parthasarathy Sivagnanam; Ratnam Sampath; Wu  Jiangang; Feeley Peter
11437111	Trims corresponding to program/erase cycles	McNeil, Jr. Jeffrey S.; Schuh Karl D.; Rayaprolu Vamsi Pavan; Puzzilli  Giuseppina; Muchherla Kishore K.; Golov Gil; Marquart Todd A.; Wu Jiangang;  Righetti Niccolo'; Malshe Ashutosh
11437112	Multi-level signaling for a memory device	Spirkl Wolfgang Anton; Richter Michael Dieter; Hein Thomas; Mayer Peter;  Brox Martin
11437116	System and method for counting fail bit and reading out the same	Mohr Christian N.; Wolff Gregg D.; Wieduwilt Christopher G.; Benitez C.  Omar; Montierth Dennis G.
11437117	NAND flash array defect real time detection	Guo Xiaojiang; Hoei Jung Sheng; Piccardi Michele; Tripathi Manan
11437119	Error read flow component	Jeon Seungjune
11437318	Microelectronic devices including staircase structures, and related  memory devices and electronic systems	Nguyen Qui V.; Siau Chang H.
11437381	Integrated assemblies having voltage sources coupled to shields and/or  plate electrodes through capacitors	Li Jiyun; Derner Scott J.
11437389	Integrated assemblies and methods of forming integrated assemblies	Luo Shuangqiang
11437391	Methods of forming microelectronic devices, and related microelectronic  devices and electronic systems	Manthena Raja Kumar Varma; Chandolu Anilkumar
11437435	On-pitch vias for semiconductor devices and associated devices and  systems	Li Hongqi; Cultra James A.
11437521	Methods of forming a semiconductor device	Sills Scott E.; Gandhi Ramanathan; Ramaswamy Durai Vishak Nirmal
11438012	Failure-tolerant error correction layout for memory sub-systems	Wu Wei; Shen Zhenlei; Chen Zhengang
11438109	Apparatuses and methods to change information values	Gunderson Marlon; Ware Kurt
11438171	Virtualized authentication device	Szubbocsev Zoltan
11438414	Inter operating system memory services over communication network  connections	Yudanov Dmitri; Akel Ameen D.; Bradshaw Samuel E.; Curewitz Kenneth  Marion; Eilert Sean Stephen
11442091	Apparatus and methods for determination of capacitive and resistive  characteristics of access lines	Xu Dan; Xu Jun; Yu Erwin E.
11442525	Power management	Guo Xiaojiang
11442531	Independent thermal throttling temperature control for memory sub-systems	Egan Curtis W.
11442631	Memory operations with consideration for wear leveling	Gupta Rajesh N.
11442634	Replay protected memory block command queue	Jean Sebastien Andre; Blodgett Greg A.
11442638	Status management in storage backed memory package	Burns Michael; Van Sickle Gary R.; Leyda Jeffery J.
11442641	Voltage based combining of block families for memory devices	Sheperek Michael; Muchherla Kishore Kumar; Nowell Shane
11442648	Data migration dynamic random access memory	Walker Robert M.; Rosenfeld Paul; La Fratta Patrick A.
11442656	Interruption of program operations at a memory sub-system	Simionescu Horia C.; Makhija Rohitkumar; Chen Peng-Cheng; Hoei Jung Sheng
11442787	Memory pooling between selected memory resources	Boehm Aaron P.; Hush Glen E.; Luo Fa-Long
11442807	Error correction code (ECC) operations in memory	Kreifels Gerard A.
11442833	Memory sub-system temperature control	Luo Ting; Liu Tao; Bueb Christopher J.; Yuen Eric; Ang Cheng Cheng
11442854	Balancing memory-portion accesses	Roberts David Andrew
11442858	Bias control for a memory device	Walker Dean; Hornung Bryan D.; Brewer Tony M.; Patrick David M.; Baronne  Christopher A.
11442867	Using a second content-addressable memory to manage memory burst accesses  in memory sub-systems	Isenegger Laurent; Bavishi Dhawal; Frederiksen Jeffrey
11442872	Memory refresh operations using reduced power	Venkata Harish N.
11442877	Data bus duty cycle distortion compensation	Wang Guan; Ghalam Ali Feiz Zarrin; Chen Chin-Yu; Kim Jongin
11442940	Apparatuses and methods for on-memory pattern matching	Bell Debra M.; Wang Libo; Wu Di; Rehmeyer James S.; Veches Anthony D.
11443778	Peak current reduction using dynamic clocking during charge pump recovery  period	Kalluru Vivek Venkata; Piccardi Michele
11443779	Drive strength calibration for multi-level signaling	Mayer Peter; Spirkl Wolfgang Anton; Richter Michael Dieter; Brox Martin;  Hein Thomas
11443780	Vertical access line multiplexor	He Yuan; Barry Beau D.; Kim Tae H.; Kawamura Christopher J.
11443788	Reference-voltage-generators within integrated assemblies	Suzuki Takamasa; Satoh Yasuo; He Yuan; Lee Hyunui
11443798	High voltage switch with mitigated gate stress	Smith Michael Andrew
11443811	Data erase operations for a memory system	Brandt Kevin R.; Hieb Adam J.; Tanguy Jonathan; Thomson Preston A.
11443812	Setting an initial erase voltage using feedback from previous operations	Stoller Scott A.; Shukla Pitamber; Venkataraman Priya; Puzzilli  Giuseppina; Righetti Niccolo′
11443816	Managing digitally-controlled charge pump operation in a memory  sub-system	Piccardi Michele
11443818	Safety and correctness data reading and programming in a non-volatile  memory device	Mondello Antonino; Troia Alberto
11443821	Memory device architecture coupled to a System-on-Chip	Mondello Antonino; Troia Alberto
11443828	Read threshold adjustment techniques for memory	Eisenhuth Robert B.
11443830	Error avoidance based on voltage distribution parameters of block  families	Sheperek Michael; Muchherla Kishore Kumar; Nowell Shane; Kaynak Mustafa  N; Koudele Larry J
11444037	Semiconductor devices having crack-inhibiting structures	Chun Hyunsuk; Yang Sheng Wei; Arifeen Shams U.
11444059	Wafer-level stacked die structures and associated systems and methods	Chang Chih Yuan
11444067	Stacked interposer structures, microelectronic device assemblies  including same, and methods of fabrication, and related electronic systems	Fay Owen R.; Yoo Chan H.
11444088	Methods of forming integrated assemblies having conductive material along  sidewall surfaces of semiconductor pillars	Li Hong; Venkatanarayanan Ramaswamy Ishwar; Tang Sanh D.; Poelstra Erica  L.
11444093	Memory arrays and methods of forming memory arrays	Tiwari Chandra
11444099	Microelectronic devices with lower recessed conductive structures and  related systems	Chandolu Anilkumar; Chary Indra V.
11444243	Electronic devices comprising metal oxide materials and related methods  and systems	Sarkar Santanu; Grubbs Robert K.; Good Farrell M.; Saxler Adam W.; Gotti  Andrea
11444771	Leveraging a trusted party third-party HSM and database to securely share  a key	Dover Lance W.
11444780	Secure replaceable verification key architecture in a memory sub-system	Strong Robert W.; Ruane James
11445157	Image processor formed in an array of memory cells	Luo Fa-Long; Cummins Jaime C.; Schmitz Tamara
11449086	Power voltage selection circuit	Miwa Ikuma; Mochida Yoshifumi
11449249	Configuring command/address channel for memory	Richter Michael Dieter; Spirkl Wolfgang Anton; Hein Thomas; Mayer Peter;  Brox Martin
11449250	Managing a mode to access a memory component or a logic component for  machine learning computation in a memory sub-system	Kale Poorna
11449258	Apparatuses and methods for accessing hybrid memory system	Kajigaya Kazuhiko
11449264	Securely arming a memory device for self-destruction by implementing a  self-destruction countdown timer using a battery backed real-time clock	Strong Robert W.
11449266	Memory sub-system event log management	Hieb Adam J.; Guy Adam C.; Tiwari Sanjay; Marquart Todd A.
11449267	Determination of durations of memory device temperatures	Rehmeyer James S.; Veches Anthony D.
11449269	Edge compute components under a memory array	Hush Glen E.; Murphy Richard C.; Sun Honglin
11449271	Implementing fault tolerant page stripes on low density memory systems	Muchherla Kishore Kumar; Helm Mark A.; Puzzilli Giuseppina; Feeley Peter;  Liu Yifen; Moschiano Violante; Goda Akira; Ratnam Sampath K.
11449272	Operation based on consolidated memory region description data	Springberg David Matthew
11449377	Adaptive frequency control for high-speed memory devices	Huang Jian; Zhou Zhenming; Xu Zhongguang; Lang Murong
11449419	Disassociating memory units with a host system	Bavishi Dhawal; Shen Zhenlei
11449524	Parking infrastructure powered by a decentralized, distributed database	Troia Alberto; Mondello Antonino
11449577	Methods and apparatus for performing video processing matrix operations  within a memory array	Luo Fa-Long
11450354	Flexible memory system with a controller and a stack of memory	Jeddeloh Joe M.; Keeth Brent
11450358	On-the-fly programming and verifying method for memory cells based on  counters and ECC feedback	Muzzetto Riccardo; Bedeschi Ferdinando; Di Vincenzo Umberto
11450368	Systems and methods for adaptive write training of three dimensional  memory	Stoddard Christopher Heaton; Lu Yang
11450373	Memory system capable of compensating for kickback noise	Chu Wei Lu; Pan Dong
11450375	Semiconductor memory devices including subword driver and layouts thereof	Shirako Takefumi; Yokomichi Masahiro; Lee Kyuseok; Hwang Sangmin
11450377	Apparatuses and methods including memory cells, digit lines, and sense  amplifiers	Kim Tae H.
11450378	Apparatuses and methods of power supply control for threshold voltage  compensated sense amplifiers	Sato Toshiyuki; Noguchi Hidekazu
11450379	Ultra-compact page buffer	Moschiano Violante
11450380	Apparatuses, systems, and methods for frequency-dependent signal  modulation	Karim M. Ataul; Hollis Timothy M.
11450381	Multi-deck memory device including buffer circuitry under array	Tanaka Tomoharu
11450382	Memory cell state in a valley between adjacent data states	Parthasarathy Sivagnanam; Khayat Patrick R.; Kaynak Mustafa N.; Eisenhuth  Robert B.
11450388	Dynamic trim selection based on operating voltage levels for  semiconductor devices and associated methods and systems	Wieduwilt Christopher G.; Rehmeyer James S.
11450391	Multi-tier threshold voltage offset bin calibration	Muchherla Kishore Kumar; Nowell Shane; Kaynak Mustafa N.; Schuh Karl D.;  Wu Jiangang; Batutis Devin M.; Luo Xiangang
11450392	Selective read disturb sampling	Muchherla Kishore Kumar; Singidi Harish R.; Padilla Renato C.; Rayaprolu  Vamsi Pavan; Malshe Ashutosh; Ratnam Sampath K.
11450403	Semiconductor memory device capable of performing  soft-post-package-repair operation	Matsubara Yasushi
11450552	Methods and apparatus for adjusting surface topography of a substrate  support apparatus	Shirley Paul D.
11450577	Methods and systems for imaging and cutting semiconductor wafers and  other semiconductor workpieces	Farnworth Warren M.; Muntifering Tom A.; Clawson Paul J.
11450601	Assemblies comprising memory cells and select gates	Hopkins John D.; Matamis George
11450645	Semiconductor assemblies with hybrid fanouts and associated methods and  systems	Bhushan Bharat; Murali Pratap; Bansal Raj K.
11450668	Integrated memory comprising secondary access devices between digit lines  and primary access devices	Derner Scott J.; Ingalls Charles L.
11450693	Single crystal horizontal access device for vertical three-dimensional  (3D) memory and method of forming 3D memory	Liu Haitao; Lee Si-Woo
11450740	Integrated memory comprising gated regions between charge-storage devices  and access devices	Derner Scott J.; Ingalls Charles L.
11451415	Circuitry for increasing bandwidth and reducing interference in memory  signals	Loftsgaarden Taylor; Hsieh Ming-ta
11451480	Lightweight artificial intelligence layer to control the transfer of big  data	Golov Gil
11454941	Peak power management of dice in a power network	Parry Jonathan S.; Palmer David A.
11454968	Artificial neural network integrity verification	Troia Alberto; Mondello Antonino; Pisasale Michelangelo
11455098	Host techniques for stacked memory systems	Pawlowski Joseph T.
11455107	Managing sequential write performance consistency for memory devices	Rajgopal Suresh; Wang Ling; Wei Yue; Rayaprolu Vamsi Pavan
11455109	Automatic wordline status bypass management	Wu Jiangang; Hoei Jung Sheng; Lin Qisong; Muchherla Kishore Kumar
11455194	Management of unmapped allocation units of a memory sub-system	Xie Tingjun; Chen Zhengang; Shen Zhenlei
11455210	Error detection and correction in memory	McCrate Joseph M.; Gleixner Robert J.
11455232	Debug operations on artificial intelligence operations	Troia Alberto
11455242	Scrubber driven wear leveling in out of place media translation	Eno Justin; Bradshaw Samuel E.
11455245	Scheme to improve efficiency of garbage collection in cached flash  translation layer	Duan Xinghui; D'Eliseo Giuseppe; Drissi Lalla Fatima; Ferrari Giuseppe;  Yuen Eric Kwok Fung; Iaculo Massimo
11455259	Memory module data object processing systems and methods	Murphy Richard C.
11455262	Reducing latency for memory operations in a memory controller	Brewer Tony
11456024	Variable clock divider	Uemura Yutaka
11456027	Suspicious activity monitoring memory system	Van De Graaff Scott D.; Plum Todd J.
11456031	Write leveling a memory device using write DLL circuitry	Chen Liang
11456032	Systems and methods for memory cell accesses	Lee Yen Chun
11456033	Dedicated commands for memory operations	Balluchi Daniele; Amato Paolo; Mirichigni Graziano; Caraccio Danilo;  Sforzin Marco; Dallabora Marco
11456034	Fully associative cache management	Pawlowski Joseph T.
11456036	Predicting and compensating for degradation of memory cells	Lu Zhongyuan; Gleixner Robert J.
11456037	Block read count voltage adjustment	Singidi Harish; Muchherla Kishore Kumar; Alsasua Gianni Stephen; Malshe  Ashutosh; Ratnam Sampath; Besinga Gary F.; Miller Michael G.
11456038	Simplified operations to read memory cells coarsely programmed via  interleaved two-pass data programming techniques	Nguyen Phong Sy; Fitzpatrick James; Muchherla Kishore Kumar
11456039	Resumption of program or erase operations in memory	Lee Eric N.; Srinivasan Dheeraj
11456043	Select gate maintenance in a memory sub-system	Batutis Devin M.; Rajagiri Avinash; Lee Sheng-Huang; Yeung Chun Sum;  Singidi Harish R.
11456049	Memory device testing, and associated methods, devices, and systems	Johnson Jason M.; Montierth Dennis G.
11456051	Optimized storage charge loss management	Besinga Gary F.; Padilla Renato C.; Opastrakoon Tawalin; Ratnam Sampath  K.; Miller Michael G.; Smitchger Christopher M.; Rayaprolu Vamsi Pavan;  Malshe Ashutosh
11456208	Methods of forming apparatuses including air gaps between conductive  lines and related apparatuses, memory devices, and electronic systems	Gupta Sidhartha; Economy David Ross; Hill Richard J.; Ritter Kyle A.;  Kaushik Naveen
11456253	Semiconductor device and method of forming the same	Sugioka Shigeru; Yamaguchi Hidenori; Fujiki Noriaki; Kawakita Keizo;  Bansal Raj K.
11456278	Methods for fabricating 3D semiconductor device packages, resulting  packages and systems incorporating such packages	Nakano Eiichi
11456284	Microelectronic device assemblies and packages and related methods	Richards Randon K.; Limaye Aparna U.; Fay Owen R.; Lim Dong Soon
11456286	Semiconductor device assembly with through-package interconnect and  associated systems, devices, and methods	Yoo Chan; Bolken Todd O.
11456289	Face-to-face semiconductor device with fan-out porch	Paek Jong Sik; Ko Yeongbeom
11456299	Integrated assemblies having voids along regions of gates, and methods of  forming conductive structures	Tang Sanh D.
11456880	Cryptographically secure mechanism for remotely controlling an autonomous  vehicle	Mondello Antonino; Troia Alberto
11456986	Single message management platform	Chhabra Bhumika; Barkam Swetha; Russo Kathryn H.; Zhao Zhao
11461011	Extended line width memory-side cache systems and methods	Murphy Richard C.; Korzh Anton; Pawlowski Stephen S.
11461017	Systems and methods for improving efficiencies of a memory system	Pawlowski J. Thomas
11461019	Systems and methods for packing data in a scalable memory system protocol	Pawlowski J. Thomas
11461020	Memory device equipped with data protection scheme	Amato Paolo
11461028	Memory writing operations with consideration for thermal thresholds	Basu Reshmi; Stube, II William Leins; Dupont Anthony Joseph; Ives Michael  Richard
11461030	Transferring data between clock domains using pulses across a queue	Chen Yueh-Hung; Kao Chih-Kuo; Tai Ying Yu; Zhu Jiangli
11461035	Adjusting a preprogram voltage based on use of a memory device	Venkataraman Priya; Shukla Pitamber; Stoller Scott A.; Puzzilli  Giuseppina; Righetti Niccolo'
11461042	Non-volatile memory module architecture to support memory error  correction	Pax George; Parry Jonathan Scott
11461048	Memory controller with programmable atomic operations	Brewer Tony M.
11461158	Granular error reporting on multi-pass programming of non-volatile memory	Lin Qisong; Rayaprolu Vamsi Pavan; Wu Jiangang; Ratnam Sampath K.;  Parthasarathy Sivagnanam; Shi Shao Chun
11461170	Error caching techniques for improved error correction in a memory device	Eilert Sean S.; Melton William A.; Eno Justin
11461197	Flash memory architecture implementing interconnection redundancy	Troia Alberto; Mondello Antonino
11461228	Multilevel addressing	Ferrante Gianfranco; Minopoli Dionisio
11461233	Handling asynchronous power loss in a memory sub-system that programs  sequentially	Lam Johnny A.; Wesenberg Alex J.; Winterfeld Michael
11461246	Multiple memory type memory module systems and methods	Murphy Richard C.
11461256	Quality of service levels for a direct memory access engine in a memory  sub-system	Bavishi Dhawal; Isenegger Laurent
11461527	Interface for data communication between chiplets or other integrated  circuits on an interposer	Brewer Tony M.
11461651	System on a chip with deep learning accelerator and random access memory	Kale Poorna; Cummins Jaime
11462249	System and method for reading and writing memory management data using a  non-volatile cell based register	Matsubara Yasushi; Jono Yusuke; Morgan Donald Martin; Yamamoto Nobuo
11462250	Apparatuses and methods for concurrently accessing different memory  planes of a memory	Pekny Theodore T.; Park Jae-Kwan; Moschiano Violante; Incarnati Michele;  Santis Luca de
11462254	Apparatus with data-rate-based voltage control mechanism and methods for  operating the same	Howe Gary L.; Wiscombe Miles S.; Rehmeyer James S.; Stave Eric J.
11462259	Apparatuses and methods for providing power responsive to internal power  usage	Kitagawa Katsuhiro
11462261	Methods of activating input/output lines of memory devices, and related  devices and systems	Takano Yosuke; Shimizu Atsushi
11462265	Reading memory cells coarsely programmed via interleaved two-pass data  programming techniques	Nguyen Phong Sy; Fitzpatrick James; Muchherla Kishore Kumar
11462277	Random telegraph signal noise reduction scheme for semiconductor memories	Tanzawa Toru
11462280	Adjusting pass-through voltage based on threshold voltage shift	Muchherla Kishore Kumar; Kaynak Mustafa N.; Ratnam Sampath K.; Feeley  Peter; Parthasarathy Sivagnanam
11462281	Intervallic dynamic start voltage and program verify sampling in a memory  sub-system	Miranda Lawrence Celso; Lee Eric N.; Liu Tong; Ning Sheyang; Loper Cobie  B.; Russo Ugo
11462283	Latch circuits with improved single event upset immunity and related  systems, apparatuses, and methods	Liu Liang
11462288	Memory component provided with a test interface	Mondello Antonino; Troia Alberto
11462289	Wordline capacitance balancing	Villa Corrado; Moser Shane D.
11462291	Apparatuses and methods for tracking word line accesses	Pan Dong
11462472	Low cost three-dimensional stacking semiconductor assemblies	Fay Owen R.; Yoo Chan H.
11462544	Array of recessed access gate lines	Tang Sanh D.; Karda Kamal M.; Mueller Wolfgang; Dhir Sourabh; Kerr  Robert; Hwang Sangmin; Liu Haitao
11462629	Field effect transistors having a fin	Tanzawa Toru
11463112	Dynamic bit flipping order for iterative error correction	Kaynak Mustafa N.; Parthasarathy Sivagnanam
11463263	Secure emergency vehicular communication	Mondello Antonino; Troia Alberto
11466685	Driver circuit equipped with power gating circuit	Kojima Mieko
11467654	Power management integrated circuit based system management bus isolation	Rowley Matthew D.
11467737	Reducing probabilistic data integrity scan collisions	Sharifi Tehrani Saeed
11467750	Adjustable physical or logical capacity criteria for write cache  replenishment based on temperature or program erase cycles of the memory  device	Bueb Christopher J.
11467761	Memory device and method for monitoring the performances of a memory  device	Troia Alberto; Mondello Antonino
11467763	Valid data aware media reliability scanning for memory sub-blocks	Palmer David Aaron
11467845	Asynchronous pipeline merging using long vector arbitration	Grassi Michael
11467897	Adaptive data integrity scan frequency	Sharifi Tehrani Saeed
11467900	Adjusting read throughput level for a data recovery operation	Zhou Zhenming; Huang Jian; Zhu Jiangli
11467901	Disposable parity	Cariello Giuseppe
11467976	Write requests with partial translation units	Bhardwaj Amit
11467979	Methods for supporting mismatched transaction granularities	Pawlowski Joseph T.
11467980	Performing a media management operation based on a sequence identifier  for a block	Muchherla Kishore Kumar; Feeley Peter; Ratnam Sampath K.; Malshe Ashutosh
11467995	Pin mapping for memory devices	Lendvay William A.; Cyr Scott R.
11468171	Secure boot via system and power management microcontroller	Strong Robert W.; Carter Dustin J.; Levine Neil
11468869	Image location based on perceived interest and display position	Christensen Carla L.; Hosseinimakarem Zahra; Chhabra Bhumika; Viswanathan  Radhika
11468923	Apparatuses and methods for controlling data timing in a multi-memory  system	Takahashi Tsugio; Liang Zer
11468930	Vertical decoder	Redaelli Andrea; Pellizzer Fabio
11468931	Memory subsystem register clock driver clock teeing	Leslie Matthew B.; Hollis Timothy M.; Greeff Roy E.
11468934	Access line disturbance mitigation	Guo Xinwei
11468937	Apparatuses and methods for generating refresh addresses	Noguchi Hidekazu
11468938	Memory with programmable refresh order and stagger time	Johnson Vaughn N.; Bell Debra M.; Wiscombe Miles S.; Pecha Brian T.;  Alexander Kyle
11468939	Conditional row activation and access during refresh for memory devices  and associated methods and systems	Wiscombe Miles S.; Bell Debra M.; Pecha Brian T.; Johnson Vaughn N.;  Alexander Kyle
11468944	Utilization of data stored in an edge section of an array	Hush Glen E.
11468948	Cleaning memory blocks using multiple types of write operations	Del Gatto Nicola
11468949	Temperature-dependent operations in a memory device	Shukla Pitamber; Puzzilli Giuseppina; Righetti Niccolo′;  Stoller Scott A.; Venkataraman Priya
11468959	Detection of an incorrectly located read voltage	Parthasarathy Sivagnanam; Fitzpatrick James; Khayat Patrick Robert;  Alhussien AbdelHakim S.
11468960	Semiconductor device with selective command delay and associated methods  and systems	Lam Boon Hor; Hilde Shawn M.; Major Karl L.; Harwell Garrett
11468962	Performing memory testing using error correction code values	Tan Kok Hua; Ngo Chee Hock; Brady Michael T.
11468965	Apparatus and techniques for programming anti-fuses to repair a memory  device	Eichmeyer Seth A.; Mullarkey Patrick
11469043	Electronic device comprising conductive material and ferroelectric  material	Nahar Manuj; Chavan Ashonita A.
11469103	Semiconductor structure formation	Tapias Nicholas R.; Sapra Sanjeev; Khandekar Anish A.; Hu Shen
11469158	Construction of integrated circuitry and a method of forming an  elevationally-elongated conductive via to a diffusion region in  semiconductive material	Togashi Yuko
11469207	Mitigating thermal impacts on adjacent stacked semiconductor devices	Huang Sui Chi
11469210	Semiconductor package with multiple coplanar interposers	Shih Shing-Yih
11469230	Vertically separated storage nodes and access devices for semiconductor  devices	Karda Kamal M.; Liu Haitao; Yang Litao
11469232	Epitaxial silicon within horizontal access devices in vertical three  dimensional (3D) memory	Lee Si-Woo
11469236	DRAM circuitry, and integrated circuitry	Lee Si-Woo
11469249	Method of fabricating electronic devices comprising removing sacrificial  structures to form a cavity	Clampitt Darwin A.; Wells David H.; Hopkins John D.; Titus Kevin Y.
11469250	Integrated assemblies having ferroelectric transistors with body regions  coupled to carrier reservoirs; and methods of forming integrated assemblies	Karda Kamal M.; Liu Haitao
11469350	Ultrathin solid state dies and methods of manufacturing the same	Odnoblyudov Vladimir; Schubert Martin F.
11469909	Physical unclonable function with NAND memory array	Mondello Antonino; Zerilli Tommaso; Condemi Carmelo; Tomaiuolo Francesco
11474698	Reset verification in a memory system by using a mode register	Schaefer Scott E.; Boehm Aaron P.
11474705	Power management integrated circuit with embedded address resolution  protocol circuitry	Rowley Matthew David; Springberg David Matthew; Carter Dustin James
11474722	Non-volatile memory including selective error correction	Christensen Carla L.
11474738	Probabilistic data integrity scan enhanced by a supplemental data  integrity scan	Sharifi Tehrani Saeed; Malshe Ashutosh; Muchherla Kishore Kumar;  Parthasarathy Sivagnanam; Rayaprolu Vamsi Pavan
11474743	Data modification	Basu Reshmi; Wang Libo
11474748	Compound feature generation in classification of error rate of data  retrieved from memory cells	Parthasarathy Sivagnanam; Fitzpatrick James; Khayat Patrick Robert;  Alhussien AbdelHakim S.
11474820	Memory mapping using commands to transfer data and/or perform logic  operations	Ross Frank F.; Prather Matthew A.
11474828	Initial data distribution for different application processes	Yudanov Dmitri; Bradshaw Samuel E.
11474865	Allocation schema for a scalable memory area	Della Monica Angelo; Papa Paolo; Manganelli Carminantonio; Iaculo Massimo
11474885	Method for an internal command of a first processing core with memory  sub-system that caching identifiers for access commands	Traver John; Shoen Jay R.
11474888	Power management component for memory sub-system voltage regulation	Spica Michael R.; Caraher Patrick T.
11474921	Log compression	Basu Reshmi; Wang Libo
11474955	Memory disablement for data security	Morrison Shea M.; Van Leeuwen Brenton P.; Frechette Blakely N.
11474965	Apparatuses and methods for in-memory data switching networks	Lea Perry V.
11475934	Ferroelectric memory cell sensing	Kawamura Christopher John; Derner Scott James
11475937	Die voltage regulation	Song Taeksang; Malik Saira S.; Lee Hyunyoo; Kim Kang-Yong
11475938	Column select swizzle	Montierth Dennis G.; Lam Boon Hor; Benitez C Omar
11475939	Apparatuses and methods for input buffer power savings	Yamashita Akira; Asaki Kenji
11475940	Semiconductor device layout for a plurality of pads and a plurality of  data queue circuits	Ishii Toshinao
11475947	Decoding architecture for memory tiles	Fantini Paolo; Martinelli Andrea; Nava Claudio
11475951	Material implication operations in memory	Pirovano Agostino; Pellizzer Fabio
11475969	Scan optimization using data selection across wordline of a memory array	Muchherla Kishore Kumar; Moschiano Violante; Zildzic Sead; Lacsao Junwyn  A.; Htet Paing Z.
11475970	Bipolar read retry	Lee Yen Chun; Sarpatwari Karthik; Gajera Nevil N.
11475974	Memory device virtual blocks using half good blocks	Namala Sri Rama; Hoei Jung Sheng; Huang Jianmin; Malshe Ashutosh; Luo  Xiangang
11476160	Microfeature workpieces and methods for forming interconnects in  microfeature workpieces	Hiatt William M.; Dando Ross S.
11476235	Stacked light emitting diode (LED) hologram display	Hosseinimakarem Zahra; Gruszka Ariela E.; Fortunati Mandy W.
11476241	Interposer, microelectronic device assembly including same and methods of  fabrication	Yoo Chan H.; Fay Owen R.
11476251	Channel integration in a three-node access device for vertical three  dimensional (3D) memory	Sills Scott E.; Smythe, III John A.; Lee Si-Woo; Sandhu Gurtej S.; Saeedi  Vahdat Armin
11476252	Memory device having 2-transistor vertical memory cell and shared channel  region	Sarpatwari Karthik; Karda Kamal M.; Ramaswamy Durai Vishak Nirmal; Liu  Haitao
11476254	Support pillars for vertical three-dimensional (3D) memory	Yokoyama Yuichi
11476255	Method used in forming an array of vertical transistors and method used  in forming an array of memory cells individually comprising a vertical  transistor and a storage device above the vertical transistor	Yang Guangjun
11476256	Integrated assemblies having body contact regions proximate transistor  body regions; and methods utilizing bowl etches during fabrication of  integrated assemblies	Juengling Werner
11476259	Memory devices including void spaces between transistor features, and  related semiconductor devices and electronic systems	Karda Kamal M.; Gandhi Ramanathan; Li Hong; Liu Haitao; Ramaswamy Durai  Vishak Nirmal; Tang Sanh D.; Sills Scott E.
11476262	Methods of forming an array of capacitors	Simsek-Ege Fatma Arzum; Ramaswamy Durai Vishak Nirmal
11476266	Microelectronic devices including staircase structures, and related  memory devices, electronic systems, and methods	Luo Shuangqiang; Lomeli Nancy M.; Xu Lifang
11476268	Methods of forming electronic devices using materials removable at  different temperatures	Tiwari Chandra S.; Shrotri Kunal
11476274	Memory arrays comprising strings of memory cells and methods used in  forming a memory array comprising strings of memory cells	Billingsley Daniel; Greenlee Jordan D.; Hopkins John D.; Hu Yongjun Jeff
11476304	Phase change memory device with voltage control elements	Pellizzer Fabio; Rigano Antonino
11476332	Integrated assemblies, and methods of forming integrated assemblies	Greenlee Jordan D.; Hopkins John D.
11477030	Method for improving safety of a component or system running a firmware  or a finite state machine	Troia Alberto; Mondello Antonino
11481119	Limiting hot-cold swap wear leveling	Zhu Fangfang; Tai Ying Yu; Chen Ning; Zhu Jiangli; Tang Alex
11481123	Techniques for failure management in memory systems	Cariello Giuseppe
11481126	Memory device error based adaptive refresh rate systems and methods	Ivanov Ivan Iliev
11481141	Secure self-purging memory partitions	Cariello Giuseppe
11481152	Execution of commands addressed to a logical block	Gaddam Venkat R.
11481221	Separate branch target buffers for different levels of calls	Wallach Steven Jeffrey
11481241	Virtual machine register in a computer processor	Wallach Steven Jeffrey
11481265	Persistent health monitoring for volatile memory systems	Bell Debra M.; Hopper Kristen M.; Prosser Erika; Boehm Aaron P.
11481273	Partitioned memory having error detection capability	Muchherla Kishore K.; Righetti Niccolo′; McNeil, Jr. Jeffrey  S.; Goda Akira; Marquart Todd A.; Helm Mark A.; Golov Gil; Binfet Jeremy;  Miccoli Carmine; Puzzilli Giuseppina
11481279	Apparatus including refresh controller controlling refresh operation  responsive to data error	Ishikawa Toru
11481299	Transmission of data for a machine learning operation using different  microbumps	Kale Poorna
11481317	Extended memory architecture	Ramesh Vijay S.; Porterfield Allan; Maes Richard D.
11481330	Cache architectures with address delay registers for memory devices	Del Gatto Nicola
11481334	Distributed computing based on memory as a service	Akel Ameen D.; Bradshaw Samuel E.; Curewitz Kenneth Marion; Eilert Sean  Stephen; Yudanov Dmitri
11481336	Host assisted operations in managed memory devices	Grosz Nadav; Parry Jonathan Scott
11481343	Transporting request types with different latencies	Brewer Tony M.
11481348	Handling operation collisions in a non-volatile memory	Adams Lyle E.; Ish Mark; Seetamraju Pushpa; Schuh Karl D.; Tupy Dan
11481353	Methods and devices for reducing array size and complexity in automata  processors	Fu Yao
11482017	Method and apparatus to recognize transported passengers and goods	Troia Alberto; Mondello Antonino
11482260	Apparatuses and methods for scatter and gather	Zawodny Jason T.; Dobelstein Kelley D.; Finkbeiner Timothy P.; Murphy  Richard C.
11482265	Write leveling	Penney Daniel B.; Howe Gary L.
11482266	Edgeless memory clusters	Castro Hernan A.
11482268	Leakage compensation for memory arrays	Vimercati Daniele
11482271	Memory with programmable die refresh stagger	Hiscock Dale H.; Kaminski Michael; Alzheimer Joshua E.; Gentry John H.
11482274	Clock signal generator generating four-phase clock signals	Tsukihashi Toshiaki
11482275	Apparatuses and methods for dynamically allocated aggressor detection	Ayyapureddi Sujeet; Morgan Donald M.
11482280	Apparatuses including multi-level memory cells and methods of operation  of same	Tortorelli Innocenzo; Meyer Russell L.; Pirovano Agostino; Redaelli  Andrea; Fratin Lorenzo; Pellizzer Fabio
11482284	Parallel drift cancellation	Pellizzer Fabio
11482298	Device field degradation and factory defect detection by pump clock  monitoring	Nevill Jason Lee; Thomson Preston Allen; Chu Chi Ming; Lee Sheng-Huang
11482409	Freezing a sacrificial material in forming a semiconductor	Thorum Matthew S.
11482492	Assemblies having conductive interconnects which are laterally and  vertically offset relative to one another	Ahmed Raju; Kotti Radhakrishna; Kewley David A.; Pratt Dave
11482504	Edge-notched substrate packaging and associated systems and methods	Fay Owen R.; Wale Madison E.; Voelz James L.; Southern Dylan W.
11482534	Integrated structures and methods of forming vertically-stacked memory  cells	Simsek-Ege Fatma Arzum; Kuo Meng-Wei; Hopkins John D.
11482536	Electronic devices comprising memory pillars and dummy pillars including  an oxide material, and related systems and methods	Hossain S M Istiaque; John Tom J.; Clampitt Darwin A.; Chandolu  Anilkumar; Rau Prakash Rau Mokhna; Larsen Christopher J.; Baek Kye Hyun
11482538	Methods of forming microelectronic devices, and related microelectronic  devices, memory devices, and electronic systems	Liu Haitao; Parekh Kunal R.
11482989	Apparatuses and methods for calibrating adjustable impedances of a  semiconductor device	Gans Dean
11483013	Error correction on a memory device	Porter John David
11483137	Dynamic command extension for a memory sub-system	Ruane James; Strong Robert W.
11483148	Batch transfer of control of memory devices over computer networks	Nelson Travis Duane; Dover Lance W.
11487339	Operating mode register	Troia Alberto
11487433	Memory systems and methods including training, data organizing, and/or  shadowing	Chen Yi; Murakami Yukiyasu
11487436	Trims corresponding to logical unit quantity	McNeil, Jr. Jeffrey S.; Righetti Niccolo'; Muchherla Kishore K.; Goda  Akira; Marquart Todd A.; Helm Mark A.; Golov Gil; Binfet Jeremy; Miccoli  Carmine; Puzzilli Giuseppina
11487444	Centralized power management in memory devices	Palmer David A.
11487464	Neural network memory	Boniardi Mattia; Tortorelli Innocenzo
11487479	Memory sub-system for performing wear-leveling adjustments based on  memory component endurance estimations	Szubbocsev Zoltan
11487609	Separating parity data from host data in a memory sub-system	Bolisetty Naveen; Kailash Rajeshwar
11487610	Methods for parity error alert timing interlock and memory devices and  systems employing the same	Waldrop William C.; Vankayala Vijayakrishna J.; Smith Scott E.
11487612	Multiple memory devices having parity protection	Singidi Harish Reddy; Luo Xiangang; Thomson Preston Allen; McNeeley  Michael G.
11487652	Host logical-to-physical information refresh	Cariello Giuseppe
11487653	L2P translation techniques in limited RAM systems to increase random  write performance using multiple L2P caches	Luo Xiangang; Liang Qing
11487666	Timed data transfer between a host system and a memory sub-system	Subbarao Sanjay
11487699	Processing of universal number bit strings accumulated in memory array  periphery	Ramesh Vijay S.
11488378	Analyzing data using a hierarchical structure	Dlugosch Paul
11488643	Method for configuring multiple input-output channels	Walker Dean E.; Brewer Tony
11488645	Methods for reading data from a storage buffer including delaying  activation of a column select	Gajapathy Parthasarathy
11488651	Systems and methods for improving power efficiency in refreshing memory  banks	Rehmeyer James S.; Bell Debra M.; Raad George B.; Callaway Brian P.;  Alzheimer Joshua E.
11488655	Subword drivers with reduced numbers of transistors and circuit layout of  the same	Miyatake Shinichi
11488656	Write techniques for a memory device with a charge transfer device	Schreck John F.; Raad George B.
11488663	Electrical distance-based wave shaping for a memory device	Sancon John Christopher
11488670	Temperature sensitive NAND programming	Luo Xiangang; Huang Jianmin; Hoei Jung Sheng; Singidi Harish Reddy; Luo  Ting; Vashi Ankit Vinod
11488677	Distributed compaction of logical states to reduce program time	Kavalipurapu Kalyan Chakravarthy; Matamis George; Dong Yingda; Siau Chang  H.
11488681	Data state synchronization	Amato Paolo; Dallabora Marco; Balluchi Daniele; Caraccio Danilo;  Confalonieri Emanuele
11488685	Adjustable column address scramble using fuses	Rehmeyer James S.; Wieduwilt Christopher G.; Raad George; Eichmeyer Seth;  Gans Dean
11488879	Methods and apparatuses to wafer-level test adjacent semiconductor die	Kariya Rajesh H.; Lam Boon Hor
11488938	Semiconductor packages with pass-through clock traces and associated  systems and methods	Kinsley Thomas H.; Pax George E.
11488945	3D stacked integrated circuits having functional blocks configured to  provide redundancy sites	Brewer Tony M.
11488963	Method of forming a semiconductor device	Sukekawa Mitsunari; Nakamura Yoshitaka
11488981	Array of vertical transistors and method used in forming an array of  vertical transistors	Lee Yi Fang; Guha Jaydip; Heineck Lars P.; Karda Kamal M.; Lee Si-Woo;  McDaniel Terrence B.; Sills Scott E.; Torek Kevin J.; Yang Sheng-Wei
11489038	Capacitors having vertical contacts extending through conductive tiers	Tessariol Paolo; Tang Qiang
11489049	Integrated assemblies, and methods of forming integrated assemblies	Haller Gordon A.
11489117	Self-aligned memory decks in cross-point memory arrays	Pirovano Agostino; Pellizzer Fabio; Conti Anna Maria; Redaelli Andrea;  Tortorelli Innocenzo
11490135	Surveillance camera upgrade via removable media having deep learning  accelerator and random access memory	Kale Poorna; Lin Te-Chang
11493550	Standalone thermal chamber for a temperature control component	Scobee Daniel G.; Semenuk Aleksandr; Thiruvengadam Aswin
11494078	Translation lookaside buffer in memory	Leidel John D.; Murphy Richard C.
11494084	Managing dielectric stress of a memory device using controlled ramping  slopes	Ning Sheyang; Miranda Lawrence
11494095	Power behavior detection in a memory device	Yeung Chun Sum; He Deping
11494102	Media management operations based on a ratio of valid data	Malshe Ashutosh; Rayaprolu Vamsi Pavan; Muchherla Kishore K.
11494111	Data operation based on valid memory unit count	Peh Woei Chen; Guda Chandra Mouli
11494114	Read threshold adjustment techniques for non-binary memory cells	Eisenhuth Robert B.
11494119	Memory searching component	Cooper-Balis Elliott C.; Walker Robert M.; Rosenfeld Paul
11494122	Command queuing	Tsai Victor Y.; Caraccio Danilo; Balluchi Daniele; Galbo Neal A.; Warren  Robert
11494124	Inversion refresh of physical memory location	Mylavarapu Sai Krishna
11494198	Output impedance calibration, and related devices, systems, and methods	Lee Hyunui
11494258	Dynamic control of error management and signaling	Richter Michael Dieter; Hein Thomas; Spirkl Wolfgang Anton; Brox Martin;  Mayer Peter
11494264	Generating a protected and balanced codeword	Laurent Christophe Vincent Antoine
11494277	Data encoding using spare channels in a memory system	Hollis Timothy Mowry
11494296	Memory shapes	Leidel John D.; Crawford, Jr. Isom
11494302	Phase change memory in a dual inline memory module	Qawami Shekoufeh; Hulbert Jared E.
11494306	Managing data dependencies in a transfer pipeline of a hybrid dimm	Simionescu Horia C.; Chin Chung Kuang; Stonelake Paul; Kotte Narasimhulu  Dharanikumar
11494311	Page table hooks to memory types	Bradshaw Samuel E.; Eno Justin M.; Eilert Sean S.; Gunasekaran  Shivasankar; Wang Hongyu; Swami Shivam
11494319	Apparatuses, systems, and methods for input/output mappings	Kim Jaeil; Tatapudi Suryanarayana B.
11494323	Addressing scheme for a memory system	Stave Eric J.
11494522	Semiconductor device with self-lock security and associated methods and  systems	Meier Nathaniel J.; Van Leeuwen Brenton P.
11494865	Passenger screening	Bielby Robert Richard Noel
11494992	Constructing an augmented reality image	Hosseinimakarem Zahra; Viswanathan Radhika; Christensen Carla L.; Chhabra  Bhumika
11495274	Apparatuses and methods for performing logical operations using sensing  circuitry	Manning Troy A.
11495279	Managing write disturb for units of memory in a memory sub-system using a  randomized refresh period	Kwong Charles See Yeung; Jeon Seungjune
11495281	Write interamble counter	Waldrop William C.; Penney Daniel B.
11495282	Sense amplifier drivers, and related devices, systems, and methods	Nishizaki Mamoru
11495283	Integrated assembly with memory array over base, sense amplifiers in  base, and vertically-extending digit lines associated with the memory array	He Yuan; Barry Beau D.
11495285	Apparatuses and methods for signal line buffer timing control	Fujishiro Keisuke; Mochida Yoshifumi
11495293	Configurable resistivity for lines in a memory device	Banerjee Koushik; Gyan Isaiah O.; Cassel Robert; Jiao Jian; Cooper  William L.; Johnson Jason R.; O'Toole Michael P.
11495299	Non-volatile memory devices and systems with volatile memory features and  methods for operating the same	Cowles Timothy B.; Raad George B.; Rehmeyer James S.; Parry Jonathan S.
11495306	Peak current management in a memory array	Piccardi Michele; Guo Xiaojiang; Kavalipurapu Kalyan Chakravarthy C.
11495309	Initiating media management operation using voltage distribution metrics  in memory system	Rayaprolu Vamsi Pavan; Smitchger Christopher M.
11495316	Optimized seasoning trim values based on form factors in memory  sub-system manufacturing	Xie Tingjun; Lang Murong; Zhou Zhenming
11495317	Managed-NAND real time analyzer and method	Vigilante Andrea; Scalisi Gianluca
11495321	Method for setting a reference voltage for read operations	Bedeschi Ferdinando; Di Vincenzo Umberto; Muzzetto Riccardo
11495322	First-pass continuous read level calibration	Sheperek Michael; Koudele Larry J.; Liikanen Bruce A.
11495530	Microelectronic devices including stadium structures, and related  methods, memory devices, and electronic systems	Clampitt Darwin A.; Lindsay Roger W.; Runia Jeffrey D.; Holland Matthew;  Chamunda Chamunda N.
11495577	Semiconductor devices having through-stack interconnects for facilitating  connectivity testing	Mohr Christian N.; Smith Scott E.
11495600	Vertical three-dimensional memory with vertical channel	Karda Kamal M.; Liu Haitao; Yang Litao
11495604	Channel and body region formation for semiconductor devices	Lee Si-Woo; Liu Haitao
11495610	Integrated circuitry, a method used in forming integrated circuitry, and  a method used in forming a memory array comprising strings of memory cells	Howder Collin; Surthi Shyam; Thorum Matthew
11495617	Electronic devices and systems with channel openings or pillars extending  through a tier stack, and methods of formation	Hopkins John D.; Lomeli Nancy M.; Dorhout Justin B.; Fazil Damir
11496149	Bit string conversion invoking bit strings having a particular data  pattern	Ramesh Vijay S.
11496341	Wireless devices and systems including examples of compensating I/Q  imbalance with neural networks or recurrent neural networks	Luo Fa-Long
11496699	Method, apparatus, and system providing an imager with pixels having  extended dynamic range	Bock Nikolai E.
11498388	Intelligent climate control in vehicles	Kale Poorna; Bielby Robert Richard Noel
11500548	Memory physical presence security identification	Hieb Adam J.; Strong Robert W.
11500555	Volatile memory to non-volatile memory interface for power management	Swami Shivam; Curewitz Kenneth Marion
11500561	Masked training and analysis with a memory array	Spirkl Wolfgang Anton; Rasmussen Phillip A.; Hein Thomas
11500564	Grouping blocks based on power cycle and power on time	Muchherla Kishore Kumar; Kaynak Mustafa N.; Wu Jiangang; Ratnam Sampath  K.; Parthasarathy Sivagnanam; Feeley Peter; Schuh Karl D.
11500567	Configuring partitions of a memory sub-system for different data	Kale Poorna
11500575	Pattern generation for multi-channel memory array	Shin Sang-Hoon
11500578	Memory access threshold based memory management	Hu Guang
11500582	Trigger margin based dynamic program step characteristic adjustment	Liikanen Bruce A.
11500588	Adjusting read voltage levels based on a temperature-dependent slope of  the threshold voltage drift of a memory sub-system	Lang Murong; Zhou Zhenming
11500637	Software instruction set update of memory die using page buffers	Stoller Scott Anthony; Majerus Douglas Eugene; Lin Qisong
11500665	Dynamic configuration of a computer processor based on the presence of a  hypervisor	Wallach Steven Jeffrey
11500766	Aggregated and virtualized solid state drives accessed via multiple  logical address spaces	Bueb Christopher Joseph; Kale Poorna
11500769	Valid data identification for garbage collection	Palmer David Aaron
11500782	Recovery of logical-to-physical table information for a memory device	Cariello Giuseppe
11500791	Status check using chip enable pin	Kim Chulbum; Helm Mark A.; Weinberg Yoav
11500794	Training procedure for receivers associated with a memory device	Mayer Peter; Hein Thomas; Brox Martin; Spirkl Wolfgang Anton; Richter  Michael Dieter
11501027	Mechanism to support writing files into a file system mounted in a secure  memory device	Duval Olivier
11501803	Memory array decoding and interconnects	Castro Hernan A.; Russell Stephen W.; Tang Stephen H.
11501804	Microelectronic devices including semiconductive pillar structures, and  related electronic systems	Fishburn Fredrick D.; Lee Si-Woo; Light Scott L.; Guo Song
11501814	Parallel access techniques within memory sections through section  independence	Fackenthal Richard E.
11501815	Sensing scheme for a memory with shared sense components	He Yuan; Kim Tae H.; Derner Scott James
11501816	Low voltage ferroelectric memory cell sensing	Vimercati Daniele
11501817	Memory cell imprint avoidance	Calderoni Alessandro; Ramaswamy Durai Vishak Nirmal; Prall Kirk; Bedeschi  Ferdinando
11501818	Self refresh of memory cell	Carman Eric S.
11501828	Apparatuses, memories, and methods for address decoding and selecting an  access line	Tang Stephen H.
11501838	Preread and read threshold voltage optimization	Jeon Seungjune; Zhou Zhenming; Shen Zhenlei
11501840	Proximity disturb remediation based on a number of programmed memory  cells	Yeung Chun Sum; Batutis Devin M.
11501842	Memory device and method with stabilization of selector devices in  strings in a memory array of the memory device	Rajagiri Avinash; Sato Shinji
11502006	Apparatuses having an interconnect extending from an upper conductive  structure, through a hole in another conductive structure, and to an  underlying structure	Yokoyama Nanae; Suzuki Ryota; Sato Makoto
11502053	Bond pad connection layout	Bhushan Bharat; Murali Pratap; Bansal Raj K.; Daycock David A.
11502085	Integrated memory with redistribution of capacitor connections, and  methods of forming integrated memory	Yang Guangjun
11502089	Three-dimensional fuse architectures and related systems, methods, and  apparatuses	He Yuan; Toyama Daigo
11502091	Thin film transistor deck selection in a memory device	Vimercati Daniele
11502179	Integrated assemblies containing ferroelectric transistors, and methods  of forming integrated assemblies	Sharma Pankaj
11502881	Channel equalization for multi-level signaling	Lin Feng; Hollis Timothy M.
11503225	Stacked polarizer hyperspectral imaging	Hosseinimakarem Zahra
11503685	Self-identifying solid-state transducer modules and associated systems  and methods	McMahon Steven A.
11507175	Data link between volatile memory and non-volatile memory	Golov Gil
11507296	Repair operation techniques	Wilson Alan J.; Morgan Donald M.
11507300	Word line group read counters	Miller Michael G.; Malshe Ashutosh; Alsasua Gianni Stephen; Padilla, Jr.  Renato; Rayaprolu Vamsi Pavan; Muchherla Kishore Kumar; Singidi Harish Reddy
11507302	Scheduling media management operations based on determined host system  usage requirements	Kale Poorna
11507304	Diagonal page mapping in memory systems	Opastrakoon Tawalin; Padilla Renato C.; Miller Michael G.; Smitchger  Christopher M.; Besinga Gary F.; Ratnam Sampath K.; Rayaprolu Vamsi Pavan
11507317	Establishing a delay period associated with a program resume operation of  a memory subsystem	Wu Jiangang; Ratnam Sampath K.; Zhang Yang; Ye Guang Chang; Muchherla  Kishore Kumar; Lu Hong; Schuh Karl D.; Rayaprolu Vamsi Pavan
11507374	True/false vector index registers and methods of populating thereof	Wallach Steven Jeffrey
11507443	Memory fault map for an accelerated neural network	Roberts David Andrew
11507449	Health characteristics of a memory device	Redaelli Marco
11507453	Low-latency register error correction	Walker Dean E.; Baronne Chris
11507493	Debugging dataflow computer architectures	Windh Skyler Arron; Brewer Tony M.; Estep Patrick
11507504	Memory sub-system for decoding non-power-of-two addressable unit address  boundaries	La Fratta Patrick A.; Walker Robert; Nagarajan Chandrasekhar
11507516	Adaptive cache partitioning	Roberts David Andrew; Pawlowski Joseph Thomas
11507518	Logical-to-physical mapping using a flag to indicate whether a mapping  entry points to [[for]] sequentially stored data	Cariello Giuseppe; Parry Jonathan S.
11507531	Apparatus and method to switch configurable logic units	Luo Fa-Long; Schmitz Tamara; Chritz Jeremy; Cummins Jaime
11508421	Electronic devices comprising air gaps adjacent to bitlines and related  methods and systems	Ramasahayam Mithun Kumar; Gossman Michael J.
11508422	Methods for memory power management and memory devices and systems  employing the same	Stave Eric J.; Pax George E.; Sharma Yogesh; King Gregory A.; Yoo Chan  H.; Richards Randon K.; Hollis Timothy M.
11508430	Data circuit for a low swing data bus	Brox Martin
11508431	Logical operations using a logical operation component	Hush Glen E.
11508433	Updating program files of a memory device using a differential write  operation	Duval Olivier
11508437	Restoring memory cell threshold voltages	Yang Lingming; Gajera Nevil; Sarpatwari Karthik
11508444	Memory cell sensing	Siau Chang H.; Nguyen Hao T.
11508447	Memories for determining data states of memory cells	Vali Tommaso; Ghodsi Ramin
11508449	Detrapping electrons to prevent quick charge loss during program verify  operations in a memory device	Lu Ching-Huang; Diep Vinh Q.; Zhang Zhengyi; Dong Yingda
11508453	Encoding test data of microelectronic devices, and related methods,  devices, and systems	Johnson Jason M.
11508455	Signal drop compensated memory	Bedeschi Ferdinando
11508458	Access schemes for access line faults in a memory device	Matsubara Yasushi
11508573	Plasma doping of gap fill materials	Sarkar Santanu; Brown Jay Steven; Qin Shu; Hu Yongjun Jeff; Good Farrell  Martin
11508657	Semiconductor devices having 3-dimensional inductive structures	Davis James E.; Duesman Kevin G.
11508734	Integrated assemblies, and methods of forming integrated assemblies	Nourbakhsh Amirhasan; Zahurak John K.; Tang Sanh D.; Borsari Silvia; Li  Hong
11508742	Devices including stair step structures adjacent substantially planar,  vertically extending surfaces of a stack structure	Sorensen Troy R.; Akhtar Mohd Kamran
11508746	Semiconductor device having a stack of data lines with conductive  structures on both sides thereof	Clampitt Darwin A.; Lindsay Roger W.; Ritchie Christopher R.; Lyonsmith  Shawn D.; King Matthew J.; Clampitt Lisa M.
11509214	Apparatuses and methods for controlling charge pump circuits	Suzuki Takamasa
11513669	User interface for modifying pictures	Chhabra Bhumika; Christensen Carla L.
11513703	Apparatus for managing data storage among groups of memory cells of  multiple reliability ranks	Christensen Carla L.; Trivedi Avani F.; Evans Tracy D.
11513713	Apparatuses and methods for partitioned parallel data movement	Willcock Jeremiah J.; Pinney David L.
11513719	Fast purge on storage devices	Grosz Nadav
11513734	Hardware-based power management integrated circuit register file write  protection	Rowley Matthew David
11513835	Notifying memory system of host events via modulated reset signals	Liang Qing; Parry Jonathan S.; Tanpairoj Kulachet; Hanna Stephen
11513837	Thread commencement and completion using work descriptor packets in a  system having a self-scheduling processor and a hybrid threading fabric	Brewer Tony M.
11513838	Thread state monitoring in a system having a multi-threaded,  self-scheduling processor	Brewer Tony M.
11513839	Memory request size management in a multi-threaded, self-scheduling  processor	Brewer Tony M.
11513840	Thread creation on local or remote compute elements by a multi-threaded,  self-scheduling processor	Brewer Tony M.
11513889	Parity protection	Yeung Chun Sum; Trivedi Falgun G.; Singidi Harish Reddy; Luo Xiangang;  Thomson Preston Allen; Luo Ting; Huang Jianmin
11513923	Dynamic fail-safe redundancy in aggregated and virtualized solid state  drives	Kale Poorna; Bueb Christopher Joseph
11513933	Apparatus with temperature mitigation mechanism and methods for operating  the same	Elmtalab Cyrus; Sloat Jacob
11513945	Apparatuses and methods for transferring data using a cache	Penney Daniel B.; Howe Gary L.
11513952	Data separation for garbage collection	Colella Nicola; Pollio Antonino
11513959	Managing collisions in a non-volatile memory system with a coherency  checker	Simionescu Horia C.; Adams Lyle E.; Xu Yongcai; Ish Mark
11513969	Hierarchical memory systems	Ramesh Vijay S.
11514174	Memory devices with cryptographic components	Mondello Antonino; Condemi Carmelo; Tomaiuolo Francesco; Zerilli Tommaso
11514953	Integrated assemblies, and methods of forming integrated assemblies	Fukuzumi Yoshiaki; Tessariol Paolo; Wells David H.; Heineck Lars P.; Hill  Richard J.; Xu Lifang; Chary Indra V.; Camerlenghi Emilio
11514955	Power management integrated circuit with dual power feed	Rowley Matthew David
11514957	Bank to bank data transfer	Lea Perry V.; Manning Troy A.
11514959	Memory device capable of adjusting clock signal based on operating speed  and propagation delay of command/address signal	Richards Randon K.; Khatri Dirgha
11514961	Memory topologies	Leslie Matthew B.
11514968	Charge leakage detection for memory system reliability	Visconti Angelo; Pazzocco Riccardo; Strand Jonathan J.; Majerus Kevin T.
11514969	Arbitrated sense amplifier	Vo Huy T.; Bedeschi Ferdinando; Tatapudi Suryanarayana B.; Lee Hyunyoo;  El-Mansouri Adam S.
11514977	Memory devices implementing data-access schemes for digit lines proximate  to edges of column planes, and related devices, systems, and methods	He Yuan; Kwak Jongtae
11514983	Identify the programming mode of memory cells based on cell statistics  obtained during reading of the memory cells	Sarpatwari Karthik; Pellizzer Fabio; Gajera Nevil N.
11514985	Spike current suppression in a memory array	Rajarajan Sundaravadivel; Venkatesan Srivatsan; Soundappa Elango Iniyan;  Cassel Robert Douglas
11514987	Erasing memory	Paolucci Giovanni Maria; Tessariol Paolo; Camerlenghi Emilio; Carnevale  Gianpietro; Benvenuti Augusto
11514989	Dynamic adjustment of offset voltages for reading memory cells in a  memory device	Kaynak Mustafa N.; Parthasarathy Sivagnanam; Khayat Patrick Robert
11514995	Memory sub-system self-testing operations	Eckel Nathan A.; Benjamin Keith A.
11515147	Material deposition systems, and related methods	Jacob Clement; Elliott Richard L.; Petz Christopher W.
11515171	Methods and apparatus for temperature modification and reduction of  contamination in bonding stacked microelectronic devices	Qu Xiaopeng; Chun Hyunsuk; Wirz Brandon P.; Bayless Andrew M.
11515174	Semiconductor devices with package-level compartmental shielding and  associated systems and methods	Kwon Youngik; Paek Jong Sik
11515198	Semiconductor constructions comprising dielectric material, and methods  of forming dielectric fill within openings extending into semiconductor  constructions	Sandhu Gurtej S.; Light Scott L.; Smythe John A.; Varghese Sony
11515204	Methods for forming conductive vias, and associated devices and systems	Gawai Trupti D.; Pratt David S.; Elsied Ahmed M.; Kewley David A.;  Collins Dale W.; Ahmed Raju; Jordan Chelsea M.; Kotti Radhakrishna
11515222	Semiconductor assemblies with flow controller to mitigate ingression of  mold material	Lin Lu Fu; Zou Yung Sheng; Gan Chong Leong; Jao Li; Chung Min Hua
11515311	Semiconductor structure formation at differential depths	Neelapala Venkata Naveen Kumar; Pandey Deepak Chandra; Kaushik Naveen
11515320	Methods of forming microelectronic devices, and related microelectronic  devices, memory devices, and electronic systems	Hopkins John D.; Greenlee Jordan D.; Lomeli Nancy M.
11515321	Memory cells, memory arrays, and methods of forming memory arrays	Kim Changhan
11515331	Integrated assemblies comprising ferroelectric transistors and  non-ferroelectric transistors	Kinney Wayne I.
11515358	Semiconductor devices including a passive material between memory cells  and conductive access lines	Tortorelli Innocenzo; Pellizzer Fabio
11515396	Ferroelectric assemblies and methods of forming ferroelectric assemblies	Liao Albert; Siddik Manzar
11515417	Transistors including heterogeneous channels	Sills Scott E.; Gandhi Ramanathan; Ramaswamy Durai Vishak Nirmal; Lee Yi  Fang; Karda Kamal M.
11515860	Deterministic jitter generator with controllable probability distribution	Gomm Tyler J.
11520240	Wafer alignment markers, systems, and related methods	Mirin Nikolay A.; Dembi Robert; Housley Richard T.; Zhang Xiaosong; Harms  Jonathan D.; Kramer Stephen J.
11520484	Namespaces allocation in non-volatile memory devices	Frolikov Alex
11520485	Data caching for ferroelectric memory	Kajigaya Kazuhiko
11520487	Managing write operations during a power loss	Sheperek Michael W.; Crowley James P.
11520491	Parity protection in non-volatile memory	Luo Xiangang; Chen Zhengang
11520497	Peak power management in a memory device	Yu Liang; Parry Jonathan Scott; Pilolli Luigi
11520500	Managing capacity reduction when downshifting multi-level memory cells	Bert Luca
11520502	Performance control for a memory sub-system	Li Yun; Crowley James P.; Wu Jiangang; Xu Peng
11520513	Code word format and structure	Pawlowski Joseph T.
11520517	Data logging sub-system for memory sub-system controller	Spica Michael Richard
11520524	Host adaptive memory device optimization	Grosz Nadav; Palmer David Aaron
11520525	Integrated pivot table in a logical-to-physical mapping having entries  and subsets associated via a flag	D'Eliseo Giuseppe; Porzio Luca; Hanna Stephen
11520529	Signal development caching in a memory device	Yudanov Dmitri A.; Jain Shanky Kumar
11520656	Managing capacity reduction and recovery due to storage device failure	Bert Luca
11520657	Defect detection in memory based on active monitoring of read operations	Shen Zhenlei; Xie Tingjun; Adi Frederick; Wang Wei; Zhou Zhenming
11520699	Using a common pool of blocks for user data and a system data structure	Muchherla Kishore Kumar; Tanpairoj Kulachet; Feeley Peter; Ratnam Sampath  K.; Malshe Ashutosh
11520711	Semiconductor device with secure access key and associated methods and  systems	Van Leeuwen Brenton P.; Meier Nathaniel J.
11520718	Managing hazards in a memory controller	Brewer Tony
11521669	Semiconductor device having cam that stores address signals	Enomoto Honoka; Morohashi Masaru
11521670	Word lines coupled to pull-down transistors, and related devices,  systems, and methods	Lovett Simon J.
11521690	NAND data placement schema	Manganelli Carminantonio; Papa Paolo; Iaculo Massimo; D'Eliseo Giuseppe;  Sassara Alberto
11521694	Adjustment to trim settings based on a use of a memory device	Hartz Ezra E.; De La Cerda Joseph A.; Rivera Benjamin; Ford Bruce J.;  Soberanes Nicolas; Moore Christopher
11521699	Adjusting a reliability scan threshold in a memory sub-system	Rayaprolu Vamsi Pavan; Muchherla Kishore Kumar; Malshe Ashutosh; Alsasua  Gianni S.; Singidi Harish R.
11521897	Methods of forming microelectronic devices	Chandolu Anilkumar; Ritchie Christopher R.; Clampitt Darwin A.; Hossain S  M Istiaque
11521979	Power gating in a memory device	Kitagawa Makoto
11522014	Connections for memory electrode lines	Castro Hernan A.
11522559	Variable read error code correction	Luo Xiangang; Luo Ting
11523264	Wireless memory interface	Mirichigni Graziano; Caraccio Danilo
11524690	Black box operations controlled by driver mental state evaluation	Golov Gil
11525956	Semiconductor devices having electro-optical substrates	Bchir Omar J.
11526277	Adjustable NAND write performance	Cariello Giuseppe; Sali Mauro Luigi; Falduti Stefano; Russo Ugo
11526280	Scalable memory system protocol supporting programmable number of levels  of indirection	Pawlowski J. Thomas
11526289	Supplemental AI processing in memory	Sun Honglin; Murphy Richard C.; Hush Glen E.
11526293	Data replication	Willcock Jeremiah J.
11526295	Managing an adjustable write-to-read delay of a memory sub-system	Lang Murong; Xie Tingjun; Wang Wei; Adi Frederick; Zhou Zhenming; Zhu  Jiangli
11526299	Elastic buffer for media management of a memory sub-system	Bianco Antonio David
11526306	Command scheduling in a memory subsystem according to a selected  scheduling ordering	La Fratta Patrick A.; Walker Robert M.
11526355	Smallest or largest value element determination	Tiwari Sanjay
11526361	Variable pipeline length in a barrel-multithreaded processor	Brewer Tony
11526393	Memory sub-system with dynamic calibration using component-based  function(s)	Cadloni Gerald L.; Liikanen Bruce A.; Moschiano Violante
11526395	Write buffer management	Wang Wei; Zhu Jiangli; Tai Ying Yu; Chen Ning; Chen Zhengang; Wu Cheng  Yuan
11526442	Metadata management for a cache	Ballapuram Chinnakrishnan; Song Taeksang; Malik Saira Samar
11526450	Memory system for binding data to a memory namespace	Bradshaw Samuel E.; Gunasekaran Shivasankar; Wang Hongyu; Eno Justin M.
11526453	Apparatus including parallel pipelines and methods of manufacturing the  same	Mazumder Kallol; Sreeram Navya Sri; Fujimaki Ryo
11527279	Read algorithm for memory device	Bedeschi Ferdinando; Di Vincenzo Umberto; Muzzetto Riccardo
11527281	Signal buffer circuit	Watanabe Kenichi; Shibuya Moeha
11527286	Voltage drivers with reduced power consumption during polarity transition	Cui Mingdong; Sirocka Nathan Joseph; Giduturi Hari
11527287	Drift aware read operations	Sarpatwari Karthik; Gajera Nevil N.; Yang Lingming; Schreck John F.
11527291	Performing a program operation based on a high voltage pulse to securely  erase data	Muchherla Kishore Kumar; Singidi Harish R.; Rayaprolu Vamsi Pavan; Malshe  Ashutosh; Ratnam Sampath K.
11527294	Memory sub-system scan	Rayaprolu Vamsi Pavan; Schuh Karl D.; McNeil, Jr. Jeffrey S.; Muchherla  Kishore K.; Malshe Ashutosh; Wu Jiangang
11527436	Microelectronic devices with through-substrate interconnects and  associated methods of manufacturing	Kirby Kyle K.; Parekh Kunal R.; Niroumand Sarah A.
11527459	Substrates for semiconductor packages, including hybrid substrates for  decoupling capacitors, and associated devices, systems, and methods	Ng Hong Wan; Chong Chin Hui; Takiar Hem P.; Ye Seng Kim; Boo Kelvin Tan  Aik
11527505	Uniform electrochemical plating of metal onto arrays of pillars having  different lateral densities and related technology	Hacker Jonathan S.
11527508	Apparatuses and methods for coupling a plurality of semiconductor devices	Leslie Matthew B.; Hollis Timothy M.; Greeff Roy E.
11527510	Finer grain dynamic random access memory	Keeth Brent
11527536	Semiconductor structure with gate electrode doping	Yoshida Mika; Moriwaki Yoshikazu
11527546	Microelectronic devices including conductive structures, and related  memory devices, electronic systems, and methods	Billingsley Daniel; King Matthew J.; Greenlee Jordan D.; Hu Yongjun J.;  George Tom; Rai Amritesh; Gupta Sidhartha; Ritter Kyle A.
11527548	Semiconductor devices and electronic systems including an etch stop  material, and related methods	Li Haoyu; McTeer Everett A.; Petz Christopher W.; Hu Yongjun J.
11527550	Memory array and a method used in forming a memory array	Kim Changhan; Hill Richard J.; Hopkins John D.; Howder Collin
11527620	Integrated assemblies having polycrystalline first semiconductor material  adjacent conductively-doped second semiconductor material	Karda Kamal M.; Pandey Deepak Chandra; Liu Haitao; Hill Richard J.; Huang  Guangyu; Gao Yunfei; Gandhi Ramanathan; Sills Scott E.
11527623	Integrated assemblies and methods of forming integrated assemblies	Lowe Aaron Michael
11527631	Memory cells having electrically conductive nanodots and apparatus having  such memory cells	Ramaswamy Nirmal
11528015	Level shifter with reduced duty cycle variation	Feiz Zarrin Ghalam Ali; Pilolli Luigi; Won Myung Gyoo
11528043	Wireless devices and systems including examples of compensating power  amplifier noise	Luo Fa-Long; Chritz Jeremy; Cummins Jaime; Schmitz Tamara
11528048	Mixing coefficient data for processing mode selection	Luo Fa-Long
11531339	Monitoring of drive by wire sensors in vehicles	Bielby Robert Richard Noel; Kale Poorna
11531472	Scalable memory system protocol supporting programmable number of levels  of indirection	Pawlowski J. Thomas
11531490	Data transfer in port switch memory	Ross Frank F.
11531543	Backpressure control using a stop signal for a multi-threaded,  self-scheduling reconfigurable computing fabric	Brewer Tony M.
11531622	Managing data dependencies for out of order processing in a hybrid DIMM	Simionescu Horia C.; Chin Chung Kuang; Stonelake Paul; Kotte Narasimhulu  Dharanikumar
11531632	Multi-level receiver with termination-off mode	Brox Martin; Spirkl Wolfgang Anton; Hein Thomas; Richter Michael Dieter;  Mayer Peter
11532345	Self-reference sensing for memory cells	Muzzetto Riccardo
11532346	Apparatuses and methods for access based refresh timing	Brown Jason M.; Penney Daniel B.
11532347	Performing refresh operations of non-volatile memory to mitigate read  disturb	Sarpatwari Karthik; Yang Lingming; Gajera Nevil N.; Sancon John  Christopher M.
11532348	Power management across multiple packages of memory dies	Yu Liang; Butterfield Jeremy Wayne; Binfet Jeremy
11532349	Power distribution for stacked memory	Veches Anthony D.; Callaway Brian P.
11532358	Memory with automatic background precondition upon powerup	Veches Anthony D.; Bell Debra M.; Rehmeyer James S.; Bunnell Robert;  Meier Nathaniel J.
11532367	Managing programming convergence associated with memory cells of a memory  sub-system	Xu Jun; Moschiano Violante; Yu Erwin E.
11532373	Managing error-handling flows in memory devices	Muchherla Kishore Kumar; Nowell Shane; Kaynak Mustafa N.; Ratnam Sampath  K.; Feeley Peter; Parthasarathy Sivagnanam; Batutis Devin M.; Luo Xiangang
11532477	Self-assembled nanostructures including metal oxides and semiconductor  structures comprised thereof	Hendricks Nicholas; Olson Adam L.; Brown William R.; Eom Ho Seop; Chen  Xue; Jain Kaveri; Schuldenfrei Scott
11532490	Semiconductor packages with indications of die-specific information	Pio Federico
11532578	3DI solder cup	Kirby Kyle K.
11532595	Stacked semiconductor dies for semiconductor device assemblies	Lee Jungbae
11532630	Channel formation for vertical three dimensional (3D) memory	Karda Kamal M.; Liu Haitao
11532638	Memory device including multiple decks of memory cells and pillars  extending through the decks	Clampitt Darwin A.; Lyonsmith Shawn D.; King Matthew J.; Clampitt Lisa  M.; Hopkins John; Titus Kevin Y.; Chary Indra V.; Barclay Martin Jared;  Chandolu Anilkumar; Natarajan Pavithra; Lindsay Roger W.
11532699	Devices comprising crystalline materials and related systems	Mutch Michael; Nahar Manuj; Kinney Wayne I.
11533064	Error correcting code poisoning for memory devices and associated methods  and systems	Alzheimer Joshua E.; Rooney Randall J.
11536915	Methods and systems for hermetically sealed fiber to chip connections	Meade Roy; Sandhu Gurtej
11537298	Memory systems and devices including examples of accessing memory and  generating access codes using an authenticated stream cipher	Chritz Jeremy; Hulton David
11537306	Cold data detector in memory system	He Yuan; Toyama Daigo
11537307	Hybrid wear leveling for in-place data replacement media	Tai Ying Yu; Zhu Jiangli; Chen Ning
11537321	Data selection based on quality	Chhabra Bhumika; Christensen Carla L.; Hosseinimakarem Zahra
11537327	Adaptive watchdog in a memory device	Grosz Nadav; Palmer David Aaron
11537462	Apparatuses and methods for cyclic redundancy calculation for  semiconductor device	Fujimaki Ryo
11537464	Host-based error correction	Basu Reshmi; Murphy Richard C.
11537484	Salvaging bad blocks in a memory device	Namala Sri Rama; Tong Lu; Kopel Kristopher; Lee Sheng-Huang; Siau Chang  H.
11537512	Asynchronous power loss recovery for memory devices	Winterfeld Michael; Williams Steven S.; Wesenberg Alex J.; Lam Johnny A.
11537525	Hierarchical memory systems	Korzh Anton; Ramesh Vijay S.
11537526	Translating of logical address to determine first and second portions of  physical address	Palmer David A.
11537527	Dynamic logical page sizes for memory devices	Ambula Sharath Chandra; Palmer David Aaron; Matturi Venkata Kiran Kumar;  Pinisetty Sri Ramya; Kumar Sushil
11537565	Lock management associated with a key-value database system	Becker Gregory Alan; Premsankar Neelima; Boles David
11537861	Methods of performing processing-in-memory operations, and related  devices and systems	Yudanov Dmitri; Eilert Sean S.; Castro Hernan A.; Melton William A.
11538508	Memory module multiple port buffer techniques	Gibbons Jasper S.; Prather Matthew A.; Keeth Brent; Ross Frank F; Stewart  Daniel Benjamin; Rooney Randall J.
11538510	Methods of charging local input/output lines of memory devices, and  related devices and systems	Lan Jin; Takaya Genta
11538513	Memory element for weight update in a neural network	Sarpatwari Karthik; Pellizzer Fabio
11538516	Column selector architecture with edge mat optimization	He Yuan; Akamatsu Hiroshi
11538521	Adaptive application of voltage pulses to stabilize memory cell voltage  levels	Lang Murong; Xie Tingjun; Zhou Zhenming
11538522	Systems and methods for adaptive self-referenced reads of memory devices	Mirichigni Graziano; Villa Corrado
11538526	Charge separation for memory sensing	Di Vincenzo Umberto; Muzzetto Riccardo; Bedeschi Ferdinando
11538529	Adjusting voltage levels applied to a control gate of a string driver in  a memory	Guo Xiaojiang; An Guanglei; Tang Qiang
11538535	Apparatus for rapid data destruction	Zhang Zhengyi; Xu Dan; Iwasaki Tomoko Ogura
11538544	Two-stage flash programming for embedded systems	Golov Gil
11538545	Auto-power on mode for biased testing of a power management integrated  circuit (PMIC)	Lendvay William Anthony
11538546	Data compression for global column repair	Johnson Jason M.
11538711	Methods for edge trimming of semiconductor wafers and related apparatus	Lin Jing-Cheng
11538762	Methods for making double-sided semiconductor devices and related  devices, assemblies, packages and systems	Chun Hyunsuk
11538809	Metal insulator semiconductor (MIS) contact in three dimensional (3D)  vertical memory	Karda Kamal M.; Pandey Deepak Chandra; Yang Litao; Pulugurtha Srinivas;  Gao Yunfei; Liu Haitao
11538819	Integrated circuitry, a method used in forming integrated circuitry, and  a method used in forming a memory array comprising strings of memory cells	Narayanan Purnima
11538822	Integrated assemblies having metal-containing liners along bottoms of  trenches, and methods of forming integrated assemblies	Hopkins John D.; Shepherdson Justin D.; Howder Collin; Greenlee Jordan D.
11538860	Memory array with graded memory stack resistances	Pellizzer Fabio; Fratin Lorenzo; Wang Hongmei
11538919	Transistors and arrays of elevationally-extending strings of memory cells	Gandhi Ramanathan; Benvenuti Augusto; Paolucci Giovanni Maria
11538991	Methods of forming a memory cell comprising a metal chalcogenide material	Marsh Eugene P.; Uhlenbrock Stefan
11539502	Wireless devices and systems including examples of cross correlating  wireless transmissions	Luo Fa-Long; Schmitz Tamara; Chritz Jeremy; Cummins Jaime
11539623	Single field for encoding multiple elements	Brewer Tony
11539692	Setting based access to data stored in quarantined memory media	Chhabra Bhumika; Christensen Carla L.; Hosseinimakarem Zahra; Viswanathan  Radhika

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