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2020年美光在美专利状况——信息存储、半导体、计算机零部件技术有优势

已有 4523 次阅读 2021-11-29 20:33 |系统分类:博客资讯

陈立新张琳黄颖：中美欧日韩五局专利报告1882.docx

█武汉大学科教管理与评价研究中心陈立新张琳黄颖

第二部分 2020年美国发明专利统计分析报告

附录2 2020年美国发明专利统计分析报告附录

附录2.4.19 美光科技公司的美国专利状况

美光科技公司（Micron Technology, Inc.）是一家美国企业。2020年，美光科技公司获得美国发明专利1521项，比上一年增长了21%，是获得美国专利数量第19多的机构。

相对来讲，美光科技公司专利研发的优势领域是：信息存储、半导体零配件、半导体组件与集成电路、半导体制造、计算机一般零部件。在这5个技术领域上，美光科技公司的专利份额相对较高，分别占同领域专利数量的12%到2%。

从绝对数量上来看，美光科技公司的重点技术领域是：信息存储、半导体组件与集成电路、计算机一般零部件、半导体制造、半导体元件。在这5个领域上获得了数量最多的专利，为844至260项。

可见，美光科技公司的专利技术研发重点主要集中在信息存储领域。

附表2.4.19-1 2020年美光科技公司主要技术领域的专利分布

	技术领域	专利数量	占比（%）
1	信息存储	844	12.1%
2	半导体零配件	217	3.0%
3	半导体组件与集成电路	446	2.7%
4	半导体制造	261	2.2%
5	计算机一般零部件	396	1.9%
6	半导体元件	260	1.6%
7	基本电子电路	122	1.4%
8	计算机接口	218	1.0%
9	控制器和运算器（CPU）	63	0.5%
10	数字信息传输	54	0.4%
11	计算机模式体系架构	38	0.3%
12	物理信号和控制	35	0.2%
13	光电辐射测量与核物理	25	0.2%
14	计算机安全	14	0.2%
15	电热与等离子体	18	0.2%
16	通信传输系统	17	0.2%
17	计算机应用与软件工程	36	0.1%
18	发电和输变电	18	0.1%
19	电气元件和结构部件	22	0.1%
20	无线通信业务	11	0.1%

注：占比（%）指其在某领域上的专利数量占该领域的比例。

图片.png

附图2.4.19-1 2020年美光科技公司在20个相对优势领域中的专利占比

致谢

感谢河南师范大学梁立明教授、科技部中国科学技术发展战略研究院武夷山研究员、大连理工大学丁堃教授对本报告的大力支持与帮助。同时，向以不同形式对本报告提出意见和建议的专家学者们表示诚挚的感谢。

附表2.4.19-2 2020年美光科技公司（Micron Technology, Inc.）的在美专利

Patent No.	Title	Inventor
10528099	Configuration update for a memory device based on a temperature of the memory device	Fackenthal Richard E.
10528111	Apparatuses and methods for indicating an operation type associated with a power management event	Patel Vipul
10528404	Event logging in a multi-core system	Chen Xiangping
10528489	Multiple memory type memory module systems and methods	Murphy Richard C.
10529387	Apparatuses and methods for performing logical operations using sensing circuitry	Hush Glen E.
10529389	Apparatuses and methods for calibrating sense amplifiers in a semiconductor memory	Schippers Stefan Frederik
10529390	Reduction of ZQ calibration time	Satoh Yasuo
10529391	Voltage reference computations for memory decision feedback equalizers	Sreeramaneni Raghukiran
10529392	Input buffer circuit	Tsukada Shuichi
10529398	Apparatuses and methods for duty cycle error correction of clock signals	Lee Hyun Yoo
10529401	Access line management for an array of memory cells	Vimercati Daniele
10529402	Ferroelectric memory cell sensing	Kawamura Christopher John
10529403	Time-based access of a memory cell	Di Vincenzo Umberto
10529409	Apparatuses and methods to perform logical operations using sensing circuitry	Venkata Harish N.
10529410	Techniques for accessing an array of memory cells to reduce parasitic coupling	Di Vincenzo Umberto
10529412	Output buffer circuit with non-target ODT function	Arai Tetsuya
10529428	Apparatuses and methods for performing multiple memory operations	Balluchi Daniele
10529430	Methods of operating a memory device comparing input data to data stored in memory cells coupled to a data line	Eldredge Kenneth J.
10529433	Offset memory component automatic calibration (AUTOCAL) error recovery for a memory sub-system	Liikanen Bruce A.
10529434	Detecting power loss in NAND memory devices	Miller Michael G.
10529579	Method of forming a semiconductor device including a pitch multiplication	Lupo Lionel
10529592	Semiconductor device assembly with pillar array	Fay Owen R.
10529659	Semiconductor devices having electrically and optically conductive vias, and associated systems and methods	Nakano Eiichi
10529689	Semiconductor package with multiple coplanar interposers	Shih Shing-Yih
10529720	Memory cell, an array of memory cells individually comprising a capacitor and a transistor with the array comprising rows of access lines and columns of digit lines, a 2T-1C memory cell, and methods of forming an array of capacitors and access transistors there-above	Sills Scott E.
10529776	Cell pillar structures and integrated flows	Simsek-Ege Fatma Arzum
10529834	Methods of forming NAND cell units and NAND cell units	Hu Yongjun Jeff
10530613	Timing based arbitration methods and apparatuses for calibrating impedances of a semiconductor device	Wieduwilt Christopher G.
10530617	Programmable channel equalization for multi-level signaling	Lin Feng
10534394	Apparatuses and methods for providing internal memory commands and control signals in semiconductor memories	Lee Hyun Yoo
10534540	Memory protocol	Walker Robert M.
10534543	Using counters to efficiently track busy time of storage systems	Gaskill Steven
10534551	Managing write operations during a power loss	Sheperek Michael W.
10534553	Memory array accessibility	Penney Daniel B.
10534591	Multistage development workflow for generating a custom instruction set reconfigurable processor	Brewer Tony M.
10534686	Apparatuses and methods for address detection	Mazumder Kallol
10534718	Variable-size table for address translation	Haswell Jonathan M.
10534731	Interface for memory having a cache and multiple independent arrays	Minopoli Dionisio
10535378	Integrated assemblies which include non-conductive-semiconductor-material and conductive-semiconductor-material, and methods of forming integrated assemblies	Pandey Deepak Chandra
10535384	Apparatuses and methods for performing logical operations using sensing circuitry	Manning Troy A.
10535387	DQS gating in a parallelizer of a memory device	Penney Daniel B.
10535388	Apparatuses and methods for reducing row address to column address delay	Ingalls Charles L.
10535396	Memory device write circuitry	Venkata Harish N.
10535397	Sensing techniques for multi-level cells	Kawamura Christopher John
10535399	Memory arrays	Kawamura Christopher J.
10535408	Erasing memory cells	Yip Aaron S.
10535415	Trim setting determination for a memory device	Thiruvengadam Aswin
10535417	Memory system quality margin analysis and configuration	Liikanen Bruce A.
10535419	Setting a default read signal based on error correction	Ratnam Sampath K.
10535661	Integrated memory and integrated assemblies	Yokoyama Yuichi
10535665	Integrated assemblies having continuous high-dielectric films extending across channel regions of adjacent transistors	Imamoto Takuya
10535710	Methods of forming integrated circuitry	Sukekawa Mitsunari
10535711	Memory devices and memory device forming methods	Mouli Chandra
10536144	Apparatus and methods for leakage current reduction in integrated circuits	Laurent Christophe Vincent Antoine
10539489	Methods for acquiring planar view STEM images of device structures	Porter Jamie C.
10539973	Low-voltage bias generator based on high-voltage supply	Piccardi Michele
10540093	Multidimensional contiguous memory allocation	Leidel John D.
10540097	Apparatuses and methods for in-memory operations	Lea Perry V.
10540104	Systems and methods for packing data in a scalable memory system protocol	Pawlowski J. Thomas
10540144	Signed division in memory	Tiwari Sanjay
10540228	Providing data of a memory system based on an adjustable error rate	Kaynak Mustafa N.
10540274	Memory devices including dynamic superblocks, and related methods and electronic systems	Szubbocsev Zoltan
10541008	Apparatuses and methods for reducing row address to column address delay for a voltage threshold compensation sense amplifier	Kawamura Christopher
10541010	Memory device with configurable input/output interface	Hollis Timothy M.
10541015	Virtual ground sensing circuitry and related devices, systems, and methods for crosspoint ferroelectric memory	Marotta Giulio Giuseppe
10541017	Methods for independent memory bank maintenance and memory devices and systems employing the same	Raad George B.
10541019	Apparatuses and methods for dynamic voltage and frequency switching for dynamic random access memory	Gans Dean
10541021	Apparatuses and methods for implementing access line loads for sense amplifiers for open access line sensing	Levada Simone
10541027	Multifunctional memory cells	Bhattacharyya Arup
10541029	Partial block memory operations	Feeley Peter Sean
10541032	Responding to power loss	Tang Qiang
10541192	Microfeature workpieces having alloyed conductive structures, and associated methods	Farnworth Warren M.
10541229	Apparatuses and methods for semiconductor die heat dissipation	Vadhavkar Sameer S.
10541252	Memory arrays, and methods of forming memory arrays	Daycock David
10541355	Solid-state radiation transducer devices having flip-chip mounted solid-state radiation transducers and associated systems and methods	Vadhavkar Sameer S.
10541364	Memory cells with asymmetrical electrode interfaces	Pirovano Agostino
10541545	Apparatuses and methods for removing defective energy storage cells from an energy storage array	Stickel Shaun
10543579	Polishing apparatuses and polishing methods	Zhou Jian
10545685	SLC cache management	Tanpairoj Kulachet
10545695	Solid state drive controller	Post Samuel D.
10546620	Data strobe calibration	Giaccio Claudio
10546629	Memory cell sensing based on precharging an access line using a sense amplifier	Vimercati Daniele
10546632	Multi-level self-selecting memory device	Redaelli Andrea
10546636	Apparatuses and methods for accessing variable resistance memory device	Fantini Paolo
10546639	Multifunctional memory cells	Bhattacharyya Arup
10546641	Memory devices with controlled wordline ramp rates, and associated systems and methods	Vahidimowlavi Allahyar
10546777	Conductive interconnect structures incorporating negative thermal expansion materials and associated systems, devices, and methods	Li Hongqi
10546811	Assemblies which include wordlines over gate electrodes	Sukekawa Mitsunari
10546837	Semiconductor device assemblies with lids including circuit elements	Kinsley Thomas H.
10546848	Integrated assemblies and methods of forming integrated assemblies	Billingsley Daniel
10546862	Integrated assemblies having spacers of low permittivity along digit-lines, and methods of forming integrated assemblies	Yang Guangjun
10546863	Method for fabricating bit line contact	Kobayashi Naoyoshi
10546895	Phase change memory stack with treated sidewalls	Hu Yongjun Jeff
10546923	Semiconductor assemblies having semiconductor material regions with contoured upper surfaces; and methods of forming semiconductor assemblies utilizing etching to contour upper surfaces of semiconductor material	Sharma Pranav P.
10546998	Methods of forming memory and methods of forming vertically-stacked structures	Hopkins John D.
10547238	Electronic device with a charging mechanism	Piccardi Michele
10548191	Self-identifying solid-state transducer modules and associated systems and methods	McMahon Steven A.
10548230	Method for stress reduction in semiconductor package via carrier	McClain Benjamin L.
10551129	Semiconductor device assembly with vapor chamber	Groothuis Steven K.
10552066	Systems and methods for data path power savings in DDR5 memory devices	Kandikonda Ravi Kiran
10552087	Methods for performing multiple memory operations in response to a single command and memory devices and systems employing the same	Prather Matthew A.
10552254	Partially written superblock treatment	Srinivasan Dheeraj
10552311	Recovery for non-volatile memory after power loss	Edgington Joseph Douglas
10552316	Controlling NAND operation latency	D'Eliseo Giuseppe
10553058	Secure wireless lock-actuation exchange	Troia Alberto
10553259	Semiconductor dies supporting multiple packaging configurations and associated methods	Brox Martin
10553263	Memory device with write data bus control	Kondo Chikara
10553271	Method and apparatus for precharge and refresh control	Richter Michael
10553278	Media manager cache eviction timer for reads and writes during resistivity drift	Narsale Ashay
10553289	Apparatus and methods for determining an expected data age of memory cells	De Santis Luca
10553290	Read disturb scan consolidation	Muchherla Kishore Kumar
10553566	Stacked semiconductor die assemblies with die substrate extensions	Watanabe Fumitomo
10553587	Array of cross point memory cells and methods of forming an array of cross point memory cells	Ramaswamy Durai Vishak Nirmal
10553594	Apparatuses and methods for reading memory cells	Matsubara Yasushi
10553595	Memory cell and an array of memory cells	Ramaswamy Durai Vishak Nirmal
10553607	Method of forming an array of elevationally-extending strings of programmable memory cells and method of forming an array of elevationally-extending strings of memory cells	Howder Collin
10553611	Memory arrays and methods of fabricating integrated structure	Meldrim John M.
10553673	Methods used in forming at least a portion of at least one conductive capacitor electrode of a capacitor that comprises a pair of conductive capacitor electrodes having a capacitor insulator there-between and methods of forming a capacitor	Nahar Manuj
10553703	Array of elevationally-extending transistors and a method used in forming an array of elevationally-extending transistors	Simsek-Ege Fatma Arzum
10553745	Light-emitting metal-oxide-semiconductor devices and associated systems, devices, and methods	Schubert Martin F.
10553760	Solid state transducer dies having reflective features over contacts and associated systems and methods	Schubert Martin F.
10553792	Textured memory cell structures	Redaelli Andrea
10554349	Apparatuses and methods to change information values	Gunderson Marlon
10554375	Full duplex device-to-device cooperative communication	Luo Fa-Long
10555394	Solid state lighting systems and associated methods of operation and manufacture	Tipirneni Anil
10559337	Vertical decoder	Redaelli Andrea
10559339	Periphery fill and localized capacitance	Kawamura Christopher John
10559343	Memory device with a signal control mechanism	Yamashita Akira
10559347	Processing in memory (PIM) capable memory device having timing circuitry to control timing of operations	Murphy Richard C.
10559353	Weight storage using memory device	Boniardi Mattia
10559360	Apparatuses and methods for determining population count	Finkbeiner Timothy P.
10559367	Reducing programming disturbance in memory devices	Yip Aaron
10559369	Voltage degradation aware NAND array management	Jean Sebastien Andre
10559466	Methods of forming a channel region of a transistor and methods used in forming a memory array	Wells David H.
10559495	Methods for processing semiconductor dice and fabricating assemblies incorporating same	Bayless Andrew M.
10559531	Integrated circuit structures comprising conductive vias and methods of forming conductive vias	Liu Zengtao T.
10559551	Semiconductor device assembly with heat transfer structure formed from semiconductor material	Vadhavkar Sameer S.
10559579	Assemblies having vertically-stacked conductive structures	Greenlee Jordan D.
10559719	Solid-state radiation transducer devices having at least partially transparent buried-contact elements, and associated systems and methods	Schubert Martin F.
10560085	Apparatuses for reducing off state leakage currents	Garofalo Pierguido
10560100	Apparatuses and methods including configurable logic circuits and layout thereof	Ota Ken
10560108	Apparatuses and methods for detecting a loop count in a delay-locked loop	Satoh Yasuo
10560263	Secure memory arrangements	Dover Lance W.
10564690	Power interrupt management	Jeddeloh Joseph M.
10565151	Memory devices and systems with parallel impedance adjustment circuitry and methods for operating the same	Lee Hyun Yoo
10566036	Apparatuses and method for reducing sense amplifier leakage current during active power-down	Kawamura Christopher
10566040	Variable page size architecture	Villa Corrado
10566043	Multi-level storage in ferroelectric memory	Kawamura Christopher John
10566052	Auto-referenced memory cell read techniques	Mirichigni Graziano
10566053	Memory cells programmed via multi-mechanism charge transports	Bhattacharyya Arup
10566063	Memory system with dynamic calibration using a trim management mechanism	Sheperek Michael
10566070	Electronic device with a fuse read mechanism	Sreeramaneni Raghukiran
10566136	Capacitors, integrated assemblies including capacitors, and methods of forming integrated assemblies	Wang Kuo-Chen
10566229	Microelectronic package structures including redistribution layers	Shih Shing-Yih
10566241	Methods of forming a semiconductor device, and related semiconductor devices and systems	Chandolu Anilkumar
10566281	Integrated assemblies having structures along a first pitch coupled with structures along a second pitch different from the first pitch, and methods of forming integrated assemblies	Juengling Werner
10566332	Semiconductor devices	Wang Kuo-Chen
10566334	Methods used in forming integrated circuitry including forming first, second, and third contact openings	Lee Si-Woo
10566686	Stacked memory package incorporating millimeter wave antenna in die stack	Kaeding John F.
10571558	Systems and methods to use radar in RFID systems	Tuttle John R.
10572164	Systems and methods for improving efficiencies of a memory system	Pawlowski J. Thomas
10572338	Estimating an error rate associated with memory	Parthasarathy Sivagnanam
10572377	Row hammer refresh for content addressable memory devices	Zhang Yu
10572388	Managed NVM adaptive cache management	Christensen Carla L.
10572414	Methods and systems for devices with self-selecting bus decoder	Noyes Harold B
10573353	Methods of operating voltage generation circuits	Marcerola Agostino
10573355	Self-referencing sensing schemes with coupling capacitance	Jamali Mahdi
10573357	Optimized scan interval	Muchherla Kishore Kumar
10573358	Output driver for multi-level signaling	Butterfield Justin D.
10573362	Decode circuitry coupled to a memory array	Dodge Richard K.
10573366	Unidirectional spin torque transfer magnetic memory cell structure and methods of programming the same	Liu Jun
10573370	Apparatus and methods for triggering row hammer address sampling	Ito Yutaka
10573371	Systems and methods for controlling data strobe signals during read operations	Takahashi Tsugio
10573372	Sensing operations in memory by comparing inputs in a sense amplifier	Suzuki Takamasa
10573373	Serializer	Watanabe Kenichi
10573377	Determining soft data for fractional digit memory cells	Parthasarathy Sivagnanam
10573379	Determining soft data	Moschiano Violante
10573383	Data state synchronization	Dallabora Marco
10573391	Enhanced flush transfer efficiency via flush prediction	Palmer David Aaron
10573513	Semiconductor structures including liners comprising alucone and related methods	Song Zhe
10573592	Assemblies having shield lines of an upper wiring level electrically coupled with shield lines of a lower wiring level	Sato Makoto
10573612	Bonding pads with thermal pathways	Gandhi Jaspreet S.
10573654	Integrated assemblies having bitline contacts	Tomoyama Tsuyoshi
10573661	Methods of filling horizontally-extending openings of integrated assemblies	Greenlee Jordan D.
10573689	Memory cell with independently-sized elements	Sciarrillo Samuele
10573720	Methods of forming platinum-containing constructions	Zagrebelny Andrey V.
10573721	Devices and methods including an etch stop protection material	Hopkins John
10573728	Field effect transistors having a fin	Tanzawa Toru
10573812	Buried low-resistance metal word lines for cross-point variable-resistance material memories	Liu Jun
10575413	Board edge connector	Smith Kurt B.
10579288	Prioritized security	Jean Sebastien Andre
10579307	Correcting power loss in NAND memory devices	Miller Michael G.
10579336	Division operations for memory	Wheeler Kyle B.
10579468	Temperature related error management	Muchherla Kishore K.
10579537	Memory having a static cache and a dynamic cache	Hale Christopher S.
10579570	Logic component switch	Li Jian
10579578	Frame protocol of memory device	Johnson James Brian
10579633	Reducing probabilistic filter query latency	Boles David
10580463	Power supply wiring in a semiconductor memory device	Nishizaki Mamoru
10580464	Sense amplifier constructions	Ingalls Charles L.
10580475	Apparatuses and methods for calculating row hammer refresh addresses in a semiconductor device	Morohashi Masaru
10580478	Systems and methods for generating stagger delays in memory devices	Ho Michael V.
10580502	Memory read apparatus and methods	Tanzawa Toru
10580506	Semiconductor memory device and erase method including changing erase pulse magnitude for a memory array	Rori Fulvio
10580710	Semiconductor device with a protection mechanism and associated systems, devices, and methods	Zhou Wei
10580720	Silicon interposer with fuse-selectable routing array	Street Bret K.
10580746	Bonding pads with thermal pathways	Gandhi Jaspreet S.
10580766	Methods of forming circuit-protection devices	Smith Michael A.
10580767	Semiconductor devices with package-level configurability	Davis James E.
10580776	Memory arrays	Juengling Werner
10580782	Methods of forming an array of elevationally-extending strings of memory cells individually comprising a programmable charge-storage transistor	Ng Wei Yeeng
10580790	Semiconductor apparatus with multiple tiers, and methods	Tanzawa Toru
10580791	Semiconductor device structures, semiconductor devices, and electronic systems	Lee Eric N.
10580792	Integrated structures and methods of forming integrated structures	Li Jie
10580795	Microelectronic devices including staircase structures, and related memory devices and electronic systems	Luo Shuangqiang
10580935	Ultrathin solid state dies and methods of manufacturing the same	Odnoblyudov Vladimir
10581434	Memory device processing	Finkbeiner Timothy P
10585597	Wear leveling	Fackenthal Richard E.
10585606	Memory device configuration commands	Siciliani Umberto
10585624	Memory protocol	Walker Robert M.
10585625	Determination of data integrity based on sentinel cells	Balluchi Daniele
10585795	Data relocation in memory having two portions of data	Amato Paolo
10585835	Methods and apparatuses for independent tuning of on-die termination impedances and output driver impedances, and related semiconductor devices and systems	Durai Elancheren
10586574	Word line cache mode	Wolff Gregg D.
10586586	Apparatuses including threshold voltage compensated sense amplifiers and methods for compensating same	Lee Kyuseok
10586592	Disturb management based on write times	McGlaughlin Edward C.
10586597	Programming of memory devices responsive to a stored representation of a programming voltage indicative of a programming efficiency	Beltrami Silvia
10586600	High-voltage shifter with reduced transistor degradation	Yamada Shigekazu
10586602	Read voltage calibration based on host IO operations	Malshe Ashutosh
10586780	Semiconductor device modules including a die electrically connected to posts and related methods	Pachamuthu Ashok
10586795	Semiconductor devices, and related memory devices and electronic systems	Sills Scott E.
10586802	Charge storage apparatus and methods	Tang Sanh D.
10586807	Arrays of elevationally-extending strings of memory cells having a stack comprising vertically-alternating insulative tiers and wordline tiers and horizontally-elongated trenches in the stacks	Xie Zhiqiang
10586830	Magnetic structures, semiconductor structures, and semiconductor devices	Kinney Wayne I.
10586923	Resistive memory cell	Rocklein Matthew N.
10591541	Comparator	Yamada Shigekazu
10592427	Logical to physical table fragments	Balluchi Daniele
10592450	Custom compute cores in integrated circuit devices	Huggins Gavin L.
10592711	Systems and methods to determine kinematical parameters	Tuttle John R.
10593376	Longest element length determination in memory	Tiwari Sanjay
10593377	Multiple endianness compatibility	Wheeler Kyle B.
10593383	System-level timing budget improvements	Kim Kang-Yong
10593384	Methods of determining host clock frequency for run time optimization of memory and memory devices employing the same	Boehm Aaron P.
10593392	Apparatuses and methods for multi-bank refresh timing	Johnson Jason M.
10593399	Self-selecting memory array with horizontal bit lines	Fratin Lorenzo
10593412	Using a status indicator in a memory sub-system to detect an event	Miller Michael G.
10593418	Comparison operations in memory	Tiwari Sanjay
10593568	Thrumold post package with reverse build up hybrid additive structure	Yoo Chan H.
10593589	Arrays of cross-point memory structures, and methods of forming arrays of cross-point memory structures	Sills Scott E.
10593607	Build-up package for integrated circuit devices, and methods of making same	Ng Hong Wan
10593637	Multi-device packages and related microelectronic devices	Kuan Shih-Fan
10593653	Packaged integrated circuit devices with through-body conductive vias, and methods of making same	Jiang Tongbi
10593678	Methods of forming semiconductor devices using aspect ratio dependent etching effects, and related semiconductor devices	Guo Song
10593695	Integrated assemblies having charge-trapping material arranged in vertically-spaced segments, and methods of forming integrated assemblies	Kim Woohee
10593730	Three-dimensional memory array	Conti Anna Maria
10593766	Methods of fabricating semiconductor structures and related semiconductor structures	Hopkins John D.
10594328	Apparatuses and methods for providing frequency divided clocks	Satoh Yasuo
10594666	Secure message including a vehicle private key	Troia Alberto
10599362	NAND flash thermal alerting	Prabhu Naveen Vittal
10599575	Media manager cache with integrated drift buffer	Narsale Ashay
10599838	Crypto-ransomware compromise detection	Schoenherr Daniel K
10600452	Interconnection for memory electrodes	Castro Hernan A.
10600456	Program operations in memory	Sforzin Marco
10600459	Apparatuses and methods for setting a duty cycle adjuster for improving clock duty cycle	Kim Kang-Yong
10600467	Offset compensation for ferroelectric memory cell sensing	Vimercati Daniele
10600472	Systems and methods for memory cell array initialization	Derner Scott J.
10600473	Apparatuses and methods to perform logical operations using sensing circuitry	Venkata Harish N.
10600480	Auto-referenced memory cell read techniques	Mirichigni Graziano
10600481	Apparatuses including memory cells and methods of operation of same	Pirovano Agostino
10600494	Methods and apparatuses for self-trimming of a semiconductor device	Jimenez-Olivares Miguel
10600496	Modifying memory bank operating parameters	Wieduwilt Christopher G.
10600498	Reduced footprint fuse circuit	Ayyapureddi Sujeet
10600667	Systems and methods for wafer alignment	Chao Yang
10600681	Methods of forming staircase structures	Williamson Lance
10600682	Semiconductor devices including a stair step structure, and related methods	Matovu John B.
10600689	Vias and conductive routing layers in semiconductor substrates	Kirby Kyle K.
10600745	Compensating for memory input capacitance	Hollis Timothy M.
10600750	Interconnect structures for preventing solder bridging, and associated systems and methods	Mayer Kyle S.
10600762	Apparatuses comprising semiconductor dies in face-to-face arrangements	Sasaki Dai
10600770	Semiconductor dice assemblies, packages and systems, and methods of operation	Nakano Eiichi
10600772	Semiconductor memory device having plural chips connected by hybrid bonding method	Sukekawa Mitsunari
10600788	Integrated assemblies comprising stud-type capacitors	Sandhu Gurtej S.
10600796	Methods of forming staircase structures	Kothari Rohit
10600807	Integrated structures and methods of forming vertically-stacked memory cells	Sun Jie
10600842	Memory cells, magnetic memory cells, and semiconductor devices	Tokashiki Ken
10600960	Semiconductor structures including memory materials substantially encapsulated with dielectric materials	Fantini Paolo
10601313	Electronic device with a reconfigurable charging mechanism	Piccardi Michele
10601410	Offset cancellation of duty cycle detector	Satoh Yasuo
10601471	Neuron calculator for artificial neural networks	Luo Fa-Long
10606300	Methods and apparatuses including a process, voltage, and temperature independent current generator circuit	Chu Wei Lu
10606512	On-die termination architecture	Mazumder Kallol
10606587	Apparatus and methods related to microcode instructions indicating instruction types	Rosti Shawn
10606693	Memory controller implemented error correction code memory	Hornung Bryan
10606694	Error correction using hierarchical decoders	Amato Paolo
10606698	Mitigating an undetectable error when retrieving critical data during error handling	Rayaprolu Vamsi Pavan
10606743	Data movement operations in non-volatile memory	Rehmeyer James S.
10606775	Computing tile	Murphy Richard C.
10607664	Sub-threshold voltage leakage current tracking	Fantini Paolo
10607665	Span mask generation	Tiwari Sanjay
10607671	Timing circuit for command path in a memory device	Chen Liang
10607675	Compensation for threshold voltage variation of memory cell components	Thiruvengadam Aswin
10607676	Sensing a memory cell	Di Vincenzo Umberto
10607677	Cell-based reference voltage generation	Derner Scott James
10607678	Apparatus and method for controlling erasing data in ferroelectric memory cells	Sakurai Kiyotake
10607681	Apparatuses and methods for switching refresh state in a memory circuit	Mazumder Kallol
10607686	Apparatuses and methods for controlling refresh operations	Akamatsu Hiroshi
10607687	Apparatuses and methods for sense line architectures for semiconductor memories	Robbs Toby D.
10607689	Apparatuses and methods for providing driving signals in semiconductor devices	Yamanaka Satoshi
10607690	DRAM sense amplifier active matching fill features for gap equivalence systems and methods	Cole Steve V.
10607693	Misplacement mitigation algorithm	Cariello Giuseppe
10607702	Responding to power loss	Bonitz Rainer
10607836	Methods of forming structures	Sandhu Gurtej S.
10607844	Pitch reduction technology using alternating spacer depositions during the formation of a semiconductor device and systems including same	Zhou Baosuo
10607851	Vapor-etch cyclic process	Li Andrew L.
10607923	Integrated assemblies comprising redundant wiring routes, and integrated circuit decks having openings extending therethrough	Juengling Werner
10607936	Construction of integrated circuitry and a method of forming an elevationally-extending conductor laterally between a pair of structures	Borsari Silvia
10607966	Stacked semiconductor dies with selective capillary under fill	Watanabe Mitsuhisa
10607988	Apparatuses having memory cells with two transistors and one capacitor, and having body regions of the transistors coupled with reference voltages	Karda Kamal M.
10607994	Vertical 2T-2C memory cells and memory arrays	Derner Scott J.
10607995	Memory arrays	Roberts Martin C.
10607996	Construction of integrated circuitry, DRAM circuitry, a method of forming a conductive line construction, a method of forming memory circuitry, and a method of forming DRAM circuitry	Sasaki Takashi
10607998	Integrated circuitry, DRAM circuitry, method of forming a plurality of conductive vias, and method of forming DRAM circuitry	Iwaki Takayuki
10608003	Integrated circuitry and 3D memory	Daycock David
10608004	Semiconductor devices and methods of fabrication	Zhu Hongbin
10608005	Thickened sidewall dielectric for memory cell	Weimer Ronald A.
10608012	Memory devices including memory cells and related methods	Huang Guangyu
10608048	Select device for memory cell applications	Wells David H.
10608178	Memory cell structures	Sills Scott E.
10608620	Shifter circuits having registers arranged in a folded topology	Miyano Kazutaka
10608621	Per lane duty cycle correction	Howe Gary L.
10608635	Wiring with external terminal	Sato Toshiyuki
10613184	Memory arrays	Liu Zengtao T.
10613572	Systems for generating process, voltage, temperature (PVT)-independent current for a low voltage domain	Chu Wei Lu
10613925	Data duplication in a non-volatile memory	Bradshaw Samuel E.
10614338	Descriptor guided fast marching method for analyzing images and systems using the same	He Yuan
10614860	Systems for discharging leakage current over a range of process, voltage, temperature (PVT) conditions	Chu Wei Lu
10614861	Apparatuses and methods for generating a voltage in a memory	Tanaka Hitoshi
10614862	Assemblies comprising memory cells and select gates	Russo Ugo
10614870	Low power method and system for signal slew rate control	Ho Michael V.
10614872	Command signal clock gating	Gajapathy Parthasarathy
10614874	Integrated memory assemblies comprising multiple memory array decks	Derner Scott J.
10614875	Logical operations using memory cells	Manning Troy A.
10614876	Sensing charge recycling circuitry	Smith Scott E.
10614899	Program progress monitoring in a memory array	Cariello Giuseppe
10614904	Apparatuses and methods for high speed writing test mode for memories	Dietrich Stefan
10615069	Semiconductor structures comprising polymeric materials	Varghese Sony
10615114	Arrays of memory cells individually comprising a capacitor and a transistor and methods of forming such arrays	Ramaswamy Durai Vishak Nirmal
10615150	Semiconductor device with a layered protection mechanism and associated systems, devices, and methods	Zhou Wei
10615154	Semiconductor device assembly with through-package interconnect and associated systems, devices, and methods	Yoo Chan
10615165	Methods of forming integrated assemblies	Nourbakhsh Amirhasan
10615174	Elevationally-extending strings of memory cells individually comprising a programmable charge storage transistor and methods of processing silicon nitride-comprising materials	Wang Fei
10615221	Solid state transducer devices, including devices having integrated electrostatic discharge protection, and associated systems and methods	Odnoblyudov Vladimir
10615798	Apparatuses and methods for identifying memory devices of a semiconductor device sharing an external resistance	Gans Dean
10621091	Apparatuses and methods to perform continuous read operations	Mondello Antonino
10621117	Controlling memory devices using a shared channel	Hall, Jr. James A.
10622031	Power noise reduction technique for high density memory with gating	Venkata Harish N.
10622034	Element value comparison in memory	Tiwari Sanjay
10622050	Ferroelectric memory plate power reduction	El-Mansouri Adam S.
10622052	Reduced peak self-refresh current in a memory device	Vankayala Vijayakrishna J.
10622055	Apparatus for supplying power supply voltage to semiconductor chip including volatile memory cell	He Yuan
10622056	Apparatuses having compensator lines along wordlines and independently controlled relative to the wordlines	Pandey Deepak Chandra
10622057	Tri-level DRAM sense amplifer	Kawamura Christopher J.
10622061	Oxide based memory	Ramaswamy D. V. Nirmal
10622065	Dedicated commands for memory operations	Balluchi Daniele
10622067	Memory systems and memory writing methods	Otsuka Wataru
10622072	Methods and apparatus for pattern matching having memory cell pairs coupled in series and coupled in parallel	De Santis Luca
10622084	Methods of verifying data path integrity	Grunzke Terry
10622223	Semiconductor device with a multi-layered encapsulant and associated systems, devices, and methods	Luo Shijian
10622308	Packaged semiconductor assemblies and methods for manufacturing such assemblies	Boon Suan Jeung
10622361	Apparatuses having body connection lines coupled with access devices	Pandey Deepak Chandra
10622363	Memory cells, methods of forming an array of two transistor-one capacitor memory cells, and methods used in fabricating integrated circuitry	Sills Scott E.
10622366	Methods of forming an array comprising pairs of vertically opposed capacitors and arrays comprising pairs of vertically opposed capacitors	Chavan Ashonita A.
10622374	Vertical string of memory cells individually comprising a programmable charge storage transistor comprising a control gate and a charge storage structure and method of forming a vertical string of memory cells individually comprising a programmable charge storage transistor comprising a control gate and a charge storage structure	Zhu Hongbin
10622408	Resistive memory cell structures and methods	Pellizzer Fabio
10622442	Electronic systems and methods of forming semiconductor constructions	Bian Zailong
10622556	Methods of forming an array of cross point memory cells	Sills Scott E.
10623001	Apparatuses with an embedded combination logic circuit for high speed operations	Mazumder Kallol
10623004	Electronic device with a timing adjustment mechanism	Shi Dan
10623211	Voltage correction computations for memory decision feedback equalizers	Wu Jun
10628044	Dynamic allocation of volatile memory to storage management components of a non-volatile storage device	Gaskill Steven
10628076	Data erasure in memory sub-systems	Brandt Kevin R
10628085	Processing in memory	Lea Perry V.
10628256	Updating reliability data	Sharifi Tehrani Saeed
10628258	Die-level error recovery scheme	Basu Reshmi
10628326	Logical to physical mapping	Haswell Jonathan M.
10628354	Translation system for finer grain memory architectures	Keeth Brent
10629252	Time-based access of a memory cell	Di Vincenzo Umberto
10629261	Enhancing nucleation in phase-change memory cells	Pirovano Agostino
10629266	Memory cell programming with a programming pulse having plurality of different voltage levels	Yip Aaron S.
10629278	First-pass dynamic program targeting (DPT)	Sheperek Michael
10629280	Methods for determining an expected data age of memory cells	De Santis Luca
10629288	Adjustable voltage drop detection threshold in a memory device	Cariello Giuseppe
10629502	Apparatus and methods for through substrate via test	Hargan Ebrahim H
10629522	Semiconductor package and method for fabricating the same	Shih Shing-Yih
10629536	Through-core via	Monroe Matthew
10629547	Redistribution-layer fanout package stiffener	Lin Jing Cheng
10629647	Semiconductor devices and methods for forming patterned radiation blocking on a semiconductor device	Borthakur Swarnal
10629651	Three-dimensional memory apparatus and method of manufacturing the same	Pellizzer Fabio
10629732	Elevationally-extending transistors, devices comprising elevationally-extending transistors, and methods of forming a device comprising elevationally-extending transistors	Sills Scott E.
10630294	Apparatuses and methods for transmitting an operation mode with a clock	Choi Jung-Hwa
10630317	Method for performing error corrections of digital information codified as a symbol sequence	Lunelli Massimiliano
10635342	Data transfer techniques for multiple devices on a shared bus	Zhang Yihua
10635345	Live firmware activation in a memory system	Frolikov Alex
10635613	Transaction identification	Ross Frank F.
10635623	Semiconductor layered device with data bus	Kondo Chikara
10636459	Wear leveling	Porter John D.
10636461	Apparatuses and methods for providing multiphase clock signals	Sato Homare
10636463	Techniques for command synchronization in a memory device	Komatsu Yoshiya
10636469	Cell voltage accumulation discharge	El-Mansouri Adam S.
10636470	Source follower-based sensing scheme	Lee Hyun Yoo
10636471	Memory arrays, ferroelectric transistors, and methods of reading and writing relative to memory cells of memory arrays	Ramaswamy Durai Vishak Nirmal
10636472	Boosting a digit line voltage for a write operation	Kawamura Christopher
10636482	Methods of operating a memory with redistribution of received data	Thomson Preston A.
10636483	Apparatuses, devices and methods for sensing a snapback event in a circuit	Hirst Jeremy Miles
10636657	Semiconductor pitch patterning	Sandhu Gurtej S.
10636658	Methods of forming patterns, and methods of patterning conductive structures of integrated assemblies	Muto Akira
10636678	Semiconductor die assemblies with heat sink and associated systems and methods	Zhou Wei
10636839	Memory cells, magnetic memory cells, and semiconductor devices	Tokashiki Ken
10636942	Epitaxial formation support structures and associated methods	Sheen Calvin Wade
10636966	Thermally optimized phase change memory cells and methods of fabricating the same	Boniardi Mattia
10637648	Storage device hash production	Dover Lance W.
10637692	Memory decision feedback equalizer	Taylor Jennifer E.
10637911	Adaptive communication interface	Hoffman Jeffrey D.
10642488	Namespace size adjustment in non-volatile memory devices	Frolikov Alex
10642512	Low-speed memory operation	Kim Kang-Yong
10642695	Storage backed memory package save trigger	Dunn James E.
10642728	Storage class memory status	Porzio Luca
10643672	Memory with non-volatile configurations for efficient power management and operation of the same	Parry Jonathan S.
10643673	Apparatuses and methods for performing compare operations using sensing circuitry	Manning Troy A.
10643674	Invert operations using sensing circuitry	Hush Glen E.
10643679	Write level arbiter circuitry	Penney Daniel B.
10643686	Memory device with an array timer mechanism	Huang Zhi Qi
10643700	Apparatuses and methods for adjusting write parameters based on a write count	Qawami Shekoufeh
10643706	Seed operation for memory devices	Moschiano Violante
10643714	Shielded vertically stacked data line architecture for memory	Sakui Koji
10643717	Methods for detecting and mitigating memory media degradation and memory devices employing the same	Parry Jonathan S.
10643719	Enhanced read disturbance detection and remediation for a memory sub-system	Bradshaw Samuel E.
10643734	System and method for counting fail bit and reading out the same	Mohr Christian N.
10643906	Methods of forming a transistor and methods of forming an array of memory cells	Hwang David K.
10643991	Apparatuses and memory devices including control logic levels, and related electronic systems	Sills Scott E.
10644005	Transistors and memory arrays	Pandey Deepak Chandra
10644105	Memory device including voids between control gates	Carlson Chris M.
10644211	Vertical light emitting devices with nickel silicide bonding and methods of manufacturing	Bernhardt Michael J.
10644909	Memory decision feedback equalizer bias level generation	Sreeramaneni Raghukiran
10649656	Techniques to update a trim parameter in non-volatile memory	Qawami Shekoufeh
10649665	Data relocation in hybrid memory	Confalonieri Emanuele
10649687	Memory buffer management and bypass	Hasbun Robert Nasry
10649842	Encoding data in a modified-memory system	Hollis Timothy Mowry
10650200	Systems and methods to determine motion parameters using RFID tags	Tuttle John R.
10650878	Apparatuses and methods for refresh control	Ishikawa Toru
10650888	Tuning voltages in a read circuit	Raad George B.
10650891	Non-contact electron beam probing techniques and related structures	Majumdar Amitava
10650895	Memory devices with distributed block select for a vertical string driver tile architecture	Lee Eric N.
10650978	Methods of incorporating leaker devices into capacitor configurations to reduce cell disturb	Chavan Ashonita A.
10651050	Semiconductor device packages and structures	Nakano Eiichi
10651084	Microelectronic devices comprising manganese-containing conductive structures, and related electronic systems and methods	Ishii Kentaro
10651100	Substrates, structures within a scribe-line area of a substrate, and methods of forming a conductive line of a redistribution layer of a substrate and of forming a structure within a scribe-line area of the substrate	Sugioka Shigeru
10651129	Methods of forming alignment marks during patterning of semiconductor material	Hironaka Hideo
10651155	Thermal pads between stacked semiconductor dies and associated systems and methods	Gandhi Jaspreet S.
10651282	Apparatuses including memory cells with gaps comprising low dielectric constant materials	Lee Minsoo
10651315	Three dimensional memory	Lu Zhenyu
10651367	Electronic devices and related electronic systems	Chen Wei
10651375	Memory cells, semiconductor devices including the memory cells, and methods of operation	Quick Timothy A.
10651381	Apparatuses including electrodes having a conductive barrier material and methods of forming same	Lengade Swapnil A.
10651732	Charge pumps and methods of operating charge pumps	Li Ming H.
10651903	Autocorrelation and memory allocation for wireless communication	Luo Fa-Long
10651965	Wireless serial links for communications between devices formed in a package	Abdulla Mostafa Naguib
10652025	Secure snapshot management for data storage devices	Strong Robert W.
10652045	Computerized apparatus with a high speed data bus	Regev Zvi
10653033	Kits for enhanced cooling of components of computing devices and related computing devices, systems and methods	Qu Xiaopeng
10656231	Memory Arrays	Liu Zengtao T.
10656354	Apparatus providing simplified alignment of optical fiber in photonic integrated circuits	Sandhu Gurtej
10656833	Hybrid memory drives, computer system, and related method for operating a multi-mode hybrid drive	Pratt Thomas L.
10656995	Copy-back operations in a memory device	Cariello Giuseppe
10657078	Providing information for a controller memory buffer elasticity status of a memory sub-system to a host system	Maroney John
10657081	Individually addressing memory devices disconnected from a data bus	Schaefer Scott E.
10658017	Shifting data	Hush Glen E.
10658018	Quantizing circuits having improved sensing	Baker Russel J.
10658019	Circuit, system and method for controlling read latency	Kwak Jongtae
10658024	Systems and methods for dynamic random access memory (DRAM) cell voltage boosting	Derner Scott J.
10658025	Apparatuses and methods for detecting a row hammer attack with a bandpass filter	Ito Yutaka
10658034	Dedicated read voltages for data structures	Sforzin Marco
10658035	Apparatuses and methods of reading memory cells	Tortorelli Innocenzo
10658041	Apparatus and methods for serializing data output	Pilolli Luigi
10658047	Implementing sticky read using error control success rate associated with a memory sub-system	Singidi Harish
10658066	First-pass continuous read level calibration	Sheperek Michael
10658067	Managing data disturbance in a memory with asymmetric disturbance effects	Bradshaw Samuel E.
10658256	Semiconductor mold compound transfer system and associated methods	Koh Kean Tat
10658285	Stack of horizontally extending and vertically overlapping features, methods of forming circuitry components, and methods of forming an array of memory cells	Tang Sanh D.
10658336	Stacked semiconductor die assemblies with die support members and associated systems and methods	Ye Seng Kim
10658367	Integrated assemblies which include metal-containing interconnects to active-region pillars, and methods of forming integrated assemblies	Simsek-Ege Arzum F.
10658380	Formation of termination structures in stacked memory arrays	King Matthew J.
10658382	Elevationally-extending string of memory cells individually comprising a programmable charge storage transistor and method of forming an elevationally-extending string of memory cells individually comprising a programmable charge storage transistor	Hopkins John D.
10658427	Memory for embedded applications	Redaelli Andrea
10658428	Methods of operating memory devices and apparatuses	Russo Ugo
10658580	Semiconductor structures including multi-portion liners	Campbell Kyle B.
10658929	Apparatuses and methods for a load current control circuit for a source follower voltage regulator	Wan Yuanzhong
10663513	Apparatuses including test segment circuits having latch circuits for testing a semiconductor die	Werhane Kevin G.
10663859	Methods of forming photonic device structures and electronic devices	Meade Roy E.
10664171	Memory systems and methods including training, data organizing, and/or shadowing	Chen Yi
10664173	Write level initialization synchronization	Howe Gary
10664194	Memory system with dynamic calibration using a variable adjustment mechanism	Sheperek Michael
10664345	Physical page, logical page, and codeword correspondence	Manning Troy A.
10664411	Chained bus memory device	Tsai Victor
10664432	Semiconductor layered device with data bus inversion	Ebihara Yuki
10665272	Methods and apparatuses for compensating for source voltage	Park Jaekwan
10665285	Access schemes for section-based data protection in a memory device	Fackenthal Richard E.
10665288	Memory devices configured to provide external regulated voltages	Prather Matthew A.
10665290	Memory security techniques using auto refresh validation	He Yuan
10665292	Sensing techniques using charge transfer device	Raad George B.
10665298	Techniques to access a self-selecting memory device	Tortorelli Innocenzo
10665300	Apparatus and methods for discharging control gates after performing an access operation on a memory cell	McNeil Jeffrey S.
10665307	Memory devices configured to perform leak checks	Kessenich Jeffrey A.
10665309	Memory endurance measures based on an extrapolated function fit to metric points for a memory sub-system	Liikanen Bruce A.
10665311	Apparatuses and methods including anti-fuses and for reading and programming of same	Miyatake Shinichi
10665314	Methods and apparatuses for self-trimming of a semiconductor device	Jimenez-Olivares Miguel
10665322	Forward and reverse translation for dynamic storage media remapping	Bradshaw Samuel E.
10665391	Capacitor having bottom electrode comprising TiN	Hirata Kei
10665469	Arrays of elevationally-extending strings of memory cells and methods used in forming an array of elevationally-extending strings of memory cells	Hopkins John D.
10665593	Memory cells having a controlled conductivity region	Sandhu Gurtej S.
10665599	Integrated structures and methods of forming vertically-stacked memory cells	Zhu Hongbin
10665603	Memory arrays, and methods of forming memory arrays	Kim Changhan
10665782	Methods of forming semiconductor structures including multi-portion liners	Campbell Kyle B.
10666264	3D stacked integrated circuits having failure management	Brewer Tony M.
10666470	Decision feedback equalizer	Taylor Jennifer E.
10666725	Data center using a memory pool between selected memory resources	Boehm Aaron P.
10667621	Multi-stage memory sensing	Vo Huy T.
10671295	Methods and systems for using state vector data in a state machine engine	Brown David R.
10671298	Storing page write attributes	Rayaprolu Vamsi Pavan
10671310	Data transfer techniques for multiple devices on a shared bus	Zhang Yihua
10671460	Memory access communications through message passing interface implemented in memory systems	Mittal Samir
10671479	High performance memory controller	Moschiano Violante
10672432	Semiconductor devices, and related control logic assemblies, electronic systems, and methods	Beigel Kurt D.
10672435	Sense amplifier signal boost	Ingalls Charles
10672440	Write cycle execution based on data comparison	Frederiksen Jeffrey
10672441	Gap detection for consecutive write operations of a memory device	Penney Daniel B.
10672444	Decoder unit	Yamanaka Satoshi
10672449	Apparatus and methods for refreshing memory	Ito Yutaka
10672452	Temperature informed memory refresh	Alsasua Gianni Stephen
10672456	Three dimensional memory devices	Fishburn Fredrick David
10672457	Differential amplifier schemes for sensing memory cells	Vimercati Daniele
10672470	Performing a test of memory components with fault tolerance	Thiruvengadam Aswin
10672477	Segmented memory and operation	Tanzawa Toru
10672486	Refreshing data stored at a memory component based on a memory component characteristic component	Zhu Fangfang
10672489	Electronic device with a fuse array mechanism	Riley John E.
10672496	Devices and methods to write background data patterns in memory devices	Alzheimer Joshua E.
10672500	Non-contact measurement of memory cell threshold voltage	Majumdar Amitava
10672657	Semiconductor device structures including stair step structures, and related semiconductor devices	Park Matthew
10672679	Heat spreaders for multiple semiconductor device modules	Qu Xiaopeng
10672785	Integrated structures of vertically-stacked memory cells	Simsek-Ege Fatma Arzum
10672833	Semiconductor devices including a passive material between memory cells and conductive access lines, and related electronic devices	Tortorelli Innocenzo
10672835	Thermal insulation for three-dimensional memory arrays	Fantini Paolo
10672981	Memory cells with asymmetrical electrode interfaces	Pirovano Agostino
10673398	Auto-zero technique for opamps with a source-follower output stage based on replica referencing	Piccardi Michele
10673490	Method and apparatus for inductive coupling signal transmission	Iwakura Ken
10676722	Arrays of memory cells individually comprising a capacitor and an elevationally-extending transistor, methods of forming a tier of an array of memory cells, and methods of forming an array of memory cells individually comprising a capacitor and an elevationally-extending transistor	Ramaswamy Durai Vishak Nirmal
10678284	Apparatuses and methods for temperature independent current generations	Chu Wei Lu
10678439	Optimization of memory systems based on performance goals	Frolikov Alex
10678441	Non-deterministic memory protocol	Walker Robert M.
10678458	Data storage device idle time processing	Frolikov Alex
10678667	Holdup self-tests for power loss operations on memory systems	Majerus Douglas
10678703	Namespace mapping structual adjustment in non-volatile memory devices	Frolikov Alex
10679683	Timing circuit for command path in a memory device	Chen Liang
10679687	Memory cells and arrays of memory cells	Matsubara Yasushi
10679689	Offset cancellation for latching in a memory device	Vimercati Daniele
10679696	Cross-point memory compensation	Liu Zengtao T.
10679704	NAND temperature data management	Muchherla Kishore Kumar
10679921	Semiconductor device packages with direct electrical connections and related methods	Groothuis Steven
10679943	Electrically conductive laminate structures	Sandhu Gurtej S.
10679958	Methods of manufacturing a multi-device package	Kuan Shih-Fan
10679967	Systems enabling lower-stress processing of semiconductor device structures and related structures	Bayless Andrew M.
10679970	Semiconductor device assemblies with annular interposers	Kinsley Thomas H.
10679982	Circuit-protection devices	Smith Michael
10679991	Methods and apparatuses including a boundary of a well beneath an active area of a tap	Smith Michael
10679996	Construction of integrated circuitry and a DRAM construction	Yuki Kazuyoshi
10680006	Charge trap structure with barrier to blocking region	Carlson Chris M
10680036	Magnetic devices with magnetic and getter regions	Sandhu Gurtej S.
10680037	Cross-point memory and methods for fabrication of same	Fantini Paolo
10680057	Methods of forming a capacitor comprising ferroelectric material and including current leakage paths having different total resistances	Balakrishnan Muralikrishnan
10680170	Cross-point memory and methods for forming of the same	Pellizzer Fabio
10680795	Quadrature signal generation	Cai Liuchun
10681136	Memory network methods, apparatus, and systems	Resnick David R.
10681284	Method and apparatus providing pixel array having automatic light control pixels and image capture pixels	Moholt Jorgen
10684797	Command-in-pipeline counter for a memory device	Vankayala Vijayakrishna J.
10684955	Memory devices and methods which may facilitate tensor memory access with memory maps based on memory operations	Luo Fa-Long
10684983	Multi-level hierarchical routing matrices for pattern-recognition processors	Noyes Harold B
10685195	Systems and methods to selectively connect antennas to receive and backscatter radio frequency signals	Tuttle John R.
10685684	Power delivery circuitry	Stickel Shaun Alan
10685694	Cell bottom node reset in memory array	Sakurai Kiyotake
10685696	Apparatuses and methods for access based refresh timing	Brown Jason M.
10685699	Sort operation in memory	Wheeler Kyle B.
10685702	Memory array reset read operation	Binfet Jeremy
10685717	Erasing memory cells	Xu Jun
10685721	Apparatuses and methods for charging a global access line prior to accessing a memory	Tanzawa Toru
10685725	Performing an operation on a memory cell of a memory system at a frequency based on temperature	Ratnam Sampath K.
10685731	Erase page check	Luo Ting
10685785	Apparatuses, multi-chip modules and capacitive chips	Fishburn Fred D.
10685878	Microelectronic devices with through-substrate interconnects and associated methods of manufacturing	Kirby Kyle K.
10685882	Methods of forming through substrate interconnects	Pratt Dave
10686015	Connections for memory electrode lines	Castro Hernan A.
10686131	Transition metal doped germanium-antimony-tellurium (GST) memory device components and composition	Fantini Paolo
10686634	Multi-level signaling in memory with wide system interface	Hollis Timothy M.
10690504	Re-routing autonomous vehicles using dynamic routing and memory management for border security purposes	Szubbocsev Zoltan
10691347	Extended line width memory-side cache systems and methods	Murphy Richard C.
10691377	Adjusting scan event thresholds to mitigate memory errors	Alsasua Gianni Stephen
10691533	Error correction code scrub scheme	Kwak Jongtae
10691538	Methods and apparatuses for error correction	Varanasi Chandra C.
10691588	Memory systems for data collection and compression in a storage device	Klein Dean
10691592	Error-checking in namespaces on storage devices using a namespace table and metadata	Harris Byron D.
10691593	Predictive data storage hierarchical memory systems and methods	Korzh Anton
10691595	Cache in a non-volatile memory subsystem	Walker Robert M.
10691611	Isolated performance domains in a memory system	Ray Anirban
10691620	Encryption of executables in computational memory	Lea Perry V.
10691806	Self-measuring nonvolatile memory device systems and methods	Dover Lance Walker
10691964	Methods and systems for event reporting	Noyes Harold B
10692544	Methods of command based and current limit controlled memory device power up	Pekny Ted
10692547	Self-referencing sensing schemes with coupling capacitance	Jamali Mahdi
10692550	Tracking and correction of timing signals	King Gregory A.
10692557	Reference voltage management	Bolandrina Efrem
10692559	Performing an on demand refresh operation of a memory sub-system	Brady Michael T.
10692562	Methods for independent memory bank maintenance and memory devices and systems employing the same	Raad George B.
10692564	Memory cell sensing based on precharging an access line using a sense amplifier	Vimercati Daniele
10692572	Variable resistance memory stack with treated sidewalls	Hu Yongjun Jeff
10692580	Charge loss failure mitigation	Patel Vipul
10692727	Integrated circuit, construction of integrated circuitry, and method of forming an array	Lugani Gurpreet
10692733	Uniform back side exposure of through-silicon vias	Gandhi Jaspreet S.
10692793	Electronic device with a package-level thermal regulator mechanism and associated systems, devices, and methods	Tuttle Mark E.
10692827	Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices	Schwab Matt E.
10692841	Semiconductor devices having through-stack interconnects for facilitating connectivity testing	Mohr Christian N.
10692870	Three-dimensional devices having reduced contact length	Tanzawa Toru
10692871	Methods of forming memory arrays	Juengling Werner
10692887	Methods used in forming an array of memory cells	Juengling Werner
10692930	Self-aligned cross-point phase change memory-switch array	Lee Jong Won
10693063	Methods of forming a memory structure	Hansen Andrew J.
10693065	Tapered cell profile and fabrication	Redaelli Andrea
10693066	Methods, apparatuses, and circuits for programming a memory device	Redaelli Andrea
10693460	Fuse adjustable output driver	Takahashi Hiroki
10693504	Apparatuses and methods for staircase code encoding and decoding for storage devices	Khayat Patrick R.
10698624	Data programming	Srinivasan Dheeraj
10698636	Trigger margin based dynamic program step characteristic adjustment	Liikanen Bruce A.
10698640	Apparatuses and methods for configuring I/Os of memory for hybrid memory modules	Prather Matthew A.
10698697	Adaptive routing to avoid non-repairable memory and logic defects on automata processor	Hiscock Dale
10698734	Apparatuses and methods to determine timing of operations	Willcock Jeremiah J.
10698776	Data encoding using spare channels	Hollis Timothy Mowry
10698816	Secure logical-to-physical caching	Szubbocsev Zoltan
10699213	Space efficient random decision forest models implementation utilizing automata processors	Fu Yao
10699755	Apparatuses and methods for plate coupled sense amplifiers	El-Mansouri Adam S.
10699756	Apparatuses and methods for performing corner turn operations using sensing circuitry	Zawodny Jason T.
10699757	DQS-offset and read-RTT-disable edge control	Mazumder Kallol
10699768	Apparatuses and methods for command signal delay	Vankayala Vijayakrishna J.
10699772	Utilization of instructions stored in an edge section of an array of memory cells	Hush Glen E.
10699774	Mitigating line-to-line capacitive coupling in a memory die	Ho Michael V.
10699780	Reflow protection	Jean Sebastien Andre
10699784	Resistive memory sensing	Ramaswamy D.V. Nirmal
10700038	Methods and systems for inhibiting bonding materials from contaminating a semiconductor processing tool	McClain Benjamin L.
10700073	Integrated assemblies having dielectric regions along conductive structures, and methods of forming integrated assemblies	Yang Guangjun
10700091	Assemblies having vertically-extending structures, and methods of forming assemblies having vertically-extending channel material pillars	Economy David Ross
10700128	Three-dimensional memory array	Fantini Paolo
10700271	Methods of forming and using materials containing silicon and nitrogen	Marsh Eugene P.
10700279	Semiconductor devices and related methods	Liu Jun
10700689	Apparatuses and methods for detecting a loop count in a delay-locked loop	Satoh Yasuo
10700918	Methods and apparatuses for signal translation in a buffered memory	Hollis Timothy M.
10705747	Latency-based storage in a hybrid memory system	Caraccio Danilo
10705762	Forward caching application programming interface systems and methods	Trout Harold Robert George
10705798	Multiplication operations in memory	Tiwari Sanjay
10705963	Latency-based storage in a hybrid memory system	Caraccio Danilo
10705996	Handling operation collisions in a non-volatile memory	Adams Lyle E.
10706002	Resources sharing among vehicle applications connected via a bus	Troia Alberto
10706105	Merge tree garbage metrics	Boles David
10706106	Merge tree modifications for maintenance operations	Boles David
10706154	Enabling a secure boot from non-volatile memory	Ahlquist Brent
10706895	Interconnections for 3D memory	Tanzawa Toru
10706896	Charge pump supply oscillator	Riley John E.
10706897	Read threshold voltage selection	Varanasi Chandra C.
10706906	Cell performance recovery using cycling techniques	Calderoni Alessandro
10706907	Cell-specific referenece generation and sensing	Kawamura Christopher John
10706909	Apparatuses and methods for refresh operations including multiple refresh activations	Bessho Shinji
10706912	Memories configured to control discharge of a control gate voltage of a transistor connected between a data line and a common source	Yamada Shigekazu
10706930	3D memory device including shared select gate connections between memory blocks	Yip Aaron
10706935	Read window budget based dynamic program step characteristic adjustment	Liikanen Bruce A.
10707080	Methods of patterning a target layer	Chou Kuo-Yao
10707197	3D stacked integrated circuits having functional blocks configured to provide redundancy sites	Brewer Tony M.
10707210	Devices having a transistor and a capacitor along a common horizontal level, and methods of forming devices	Fishburn Fredrick D.
10707211	Integrated circuitry comprising an array, method of forming an array, method of forming DRAM circuitry, and method used in the fabrication of integrated circuitry	Bozdog Cornel
10707212	Methods of forming an apparatus, and related apparatuses and electronic systems	Ishii Kentaro
10707215	Methods of forming semiconductor devices, and related semiconductor devices, memory devices, and electronic systems	Simsek-Ege Arzum F.
10707220	Ferroelectric memory and methods of forming the same	Chavan Ashonita A.
10707271	Memory cells having resistors and formation of the same	Pellizzer Fabio
10707298	Methods of forming semiconductor structures	Mutch Michael
10712382	Semiconductor device structures for burn-in testing and methods thereof	Tuttle Mark E.
10712389	Scan chain operations	Alzheimer Joshua E.
10712806	Management of power state transitions of a memory sub-system	Park Kihoon
10712960	Configurable operating mode memory device and methods of operation	Roohparvar Frankie F.
10713011	Multiplication operations in memory	Tiwari Sanjay
10713060	Configurable option ROM	Duncan Kevin R.
10713155	Biased sampling methodology for wear leveling	Tai Ying Yu
10713156	Systems and methods for memory system management	Walker Robert
10713502	Providing autonomous vehicle assistance	Tiziani Federico
10714150	Flexible memory system with a controller and a stack of memory	Jeddeloh Joe M.
10714153	Reversed bias compensation for sense amplifier operation	Miyatake Shinichi
10714156	Apparatuses and method for trimming input buffers based on identified mismatches	Mohr Christian N.
10714158	Two-step data-line precharge scheme	Miyatake Shinichi
10714159	Indication in memory system or sub-system of latency associated with performing an access command	Hasbun Robert Nasry
10714160	Wave pipeline	Shakeri Kaveh
10714166	Apparatus and methods for decoding memory access addresses for access operations	Yip Aaron S.
10714167	Apparatuses having memory strings compared to one another through a sense amplifier	Kim Tae H.
10714176	Read-write cycle execution based on history	Frederiksen Jeffrey
10714177	Memory cell architecture for multilevel cell programming	Allegra Mario
10714185	Event counters for memory operations	Sforzin Marco
10714191	Determining data states of memory cells	Vali Tommaso
10714196	Methods for determining data states of memory cells	Vali Tommaso
10714206	Selectors on interface die for memory device	Kondo Chikara
10714400	Methods of forming semiconductor structures comprising thin film transistors including oxide semiconductors	Torek Kevin J.
10714456	Dual sided fan-out package having low warpage across all temperatures	Yoo Chan H.
10715127	Apparatuses and methods for using look-ahead duty cycle correction to determine duty cycle adjustment values while a semiconductor device remains in operation	Gans Dean D.
10715321	Physical unclonable function using message authentication code	Mondello Antonino
10715364	Uniformity between levels of a multi-level signal	Hollis Timothy M.
10716110	Wireless devices and systems including examples of configuration modes for baseband units and remote radio heads	Luo Fa-Long
10717141	Connection verification technique	Kinsley Thomas
10718805	Apparatus and methods for testing devices	Gregory Paul E.
10718901	Photonic device having a photonic crystal lower cladding layer provided on a semiconductor substrate	Saado Yuval
10719237	Apparatuses and methods for concurrently accessing multiple partitions of a non-volatile memory	Sundaram Rajesh
10719241	Power management integrated circuit with embedded address resolution protocol circuitry	Rowley Matthew David
10719248	Apparatuses and methods for counter update operations	Hasbun Robert N.
10719271	Temperature correction in memory sub-systems	Alsasua Gianni Stephen
10719495	Stream selection for multi-stream storage devices	Boles David
10720201	Timing control for input receiver	Hiraishi Atsushi
10720224	Protocol independent testing of memory devices using a loopback	Caraher Patrick
10720446	Integrated structures including material containing silicon, nitrogen, and at least one of carbon, oxygen, boron and phosphorus	Dorhout Justin B.
10720569	Magnetic tunnel junctions	Chen Wei
10720574	Phase change memory stack with treated sidewalls	Chan Tsz W.
10720579	Self-selecting memory cell with dielectric barrier	Fratin Lorenzo
10725680	Apparatuses and methods to change data category values	Willcock Jeremiah J.
10725696	Command selection policy with read priority	La Fratta Patrick A.
10725736	Determination of a match between data values stored by several arrays	Boehm Aaron P.
10725856	Error correction to reduce a failure in time rate	Ivanov Ivan
10725904	Synchronizing NAND logical-to-physical table region tracking	Cui Zhao
10725912	Power loss protection in memory sub-systems	Kowles Andrew M.
10725913	Variable modulation scheme for memory device access or operation	Hasbun Robert Nasry
10725930	Logical to physical memory address mapping tree	Palmer David Aaron
10725943	Apparatuses and methods for transferring data from memory on a data path	Noda Hiromasa
10725952	Accessing status information	Bell Debra M.
10725956	Memory device for a hierarchical memory architecture	Eilert Sean
10725988	KVS tree	Boles David
10726217	Systems and methods using single antenna for multiple resonant frequency ranges	Tuttle John R.
10726638	Providing autonomous vehicle maintenance	Mondello Antonino
10726884	Device having multiple channels with calibration circuit shared by multiple channels	Arai Tetsuya
10726899	Semiconductor structures, memory cells and devices comprising ferroelectric materials, systems including same, and related methods	Liao Albert
10726905	Memory device with improved writing features	Brox Martin
10726907	Electronic device with a sense amp mechanism	Derner Scott J.
10726912	Apparatuses and methods for sensing a phase-change test cell and determining changes to the test cell resistance due to thermal exposure	Brand Jason
10726917	Techniques for read operations	Bedeschi Ferdinando
10726919	Apparatuses and methods for comparing data patterns in memory	Manning Troy A.
10726934	Memory characterization and sub-system modification	Chew Francis
10726936	Bad block management for memory sub-systems	Awusie Roland J.
10727062	Methods of forming integrated circuit well structures	Violette Michael
10727109	Fluorimetry methods	Wells David H.
10727206	Memory devices with controllers under memory packages and associated systems and methods	Ye Seng Kim
10727242	Methods of forming an array of elevationally-extending strings of memory cells comprising a programmable charge storage transistor and arrays of elevationally-extending strings of memory cells comprising a programmable charge storage transistor	Dorhout Justin B.
10727249	Memory cells, integrated structures and memory arrays	Carlson Chris M.
10727250	Methods used in forming an array of elevationally-extending transistors	Greenlee Jordan D.
10727336	Ferroelectric field effect transistors, pluralities of ferroelectric field effect transistors arrayed in row lines and column lines, and methods of forming a plurality of ferroelectric field effect transistors	Ramaswamy Durai Vishak Nirmal
10727405	Chalcogenide memory device components and composition	Varesi Enrico
10727816	Internal clock distortion calibration using dc component offset of clock signal	Wang Guan
10727840	Pre-delay on-die termination shifting	Mazumder Kallol
10729012	Buried lines and related fabrication techniques	Castro Hernan A.
10731273	Source material for electronic device applications	Meldrim John Mark
10732669	Serial peripheral interface and methods of operating same	Mangalindan Paolo E.
10732890	Adjusting a parameter for a programming operation based on the temperature of a memory system	Kaynak Mustafa N.
10732892	Data transfer in port switch memory	Ross Frank F.
10733046	Transaction metadata	Mirichigni Graziano
10733050	Progressive length error control code	Pawlowski J. Thomas
10733089	Apparatuses and methods for write address tracking	Howe Gary L.
10733104	Fast non-volatile storage device recovery techniques	Palmer David Aaron
10733508	Methods and systems for data analysis in a state machine	Brown David R.
10734038	Apparatuses and methods for performing logical operations using sensing circuitry	Hush Glen E.
10734044	Apparatuses and methods for latching data input bits	Bell Debra M.
10734046	Apparatus and methods for providing voltages to conductive lines between which clock signal lines are disposed	Kitagawa Katsuhiro
10734049	Apparatuses and methods involving accessing distributed sub-blocks of memory cells	Tanzawa Toru
10734050	Apparatuses and methods for providing word line voltages	Kim Tae H.
10734057	Multiple plate line architecture for multideck memory array	Bedeschi Ferdinando
10734060	Input buffer circuit	Yamashita Akira
10734067	Memory device latch circuitry	Akamatsu Hiroshi
10734272	Semiconductor with through-substrate interconnect	Kirby Kyle K.
10734296	Electrical device with test pads encased within the packaging material	De La Cerda Joseph A.
10734359	Wiring with external terminal	Tobori Hidenori
10734370	Methods of making semiconductor devices	Ma Zhaohui
10734388	Integrated assemblies having threshold-voltage-inducing-structures proximate gated-channel-regions, and methods of forming integrated assemblies	Karda Kamal M.
10734395	Integrated assemblies and methods of forming integrated assemblies	Dorhout Justin B.
10734399	Multi-gate string drivers having shared pillar structure	Goda Akira
10734446	Three-dimensional memory apparatuses and methods of use	Pellizzer Fabio
10734491	Memory devices including gettering agents in memory charge storage structures	Brewer Rhett T.
10734527	Transistors comprising a pair of source/drain regions having a channel there-between	Ramaswamy Durai Vishak Nirmal
10734581	Memory cell structures	Sills Scott E.
10740026	Time indicator of super block operations	Brandt Kevin R.
10740173	Advanced bitwise operations and apparatus in a multi-level system with nonvolatile memory	Eisenhuth Robert B.
10740263	Apparatuses and methods for variable latency memory operations	Mirichigni Graziano
10741224	NAND cell encoding to improve data integrity	Stichka Tyson M.
10741234	Self-reference for ferroelectric memory	Vimercati Daniele
10741235	Refresh address controlling scheme based on refresh counter and mask circuit	Nakamura Takaaki
10741239	Processing in memory device including a row address strobe manager	Lea Perry V.
10741241	Apparatuses and methods for subarray addressing in a memory device	Hush Glen E.
10741243	Auto-referenced memory cell read techniques	Mirichigni Graziano
10741252	Apparatus and methods for programming memory cells using multi-step programming pulses	Lee Eric N.
10741258	Memory configured to generate a data value from a data line connected to more than one string of series-connected memory cells	Vali Tommaso
10741259	Apparatuses and methods using dummy cells programmed to different states	Tanzawa Toru
10741260	Systems and methods providing improved calibration of memory control voltage	Kavalipurapu Kalyan
10741263	Standby biasing techniques to reduce read disturbs	Piccardi Michele
10741382	Methods of forming nanostructures using self-assembled nucleic acids, and nanostructures thereof	Sills Scott E.
10741445	Integrated circuits having parallel conductors	Hansen Tyler G.
10741460	Methods for forming interconnect assemblies with probed bond pads	Fay Owen R.
10741468	Stacked semiconductor die assemblies with multiple thermal paths and associated systems and methods	Groothuis Steven K.
10741528	Semiconductor device with an electrically-coupled protection mechanism and associated systems, devices, and methods	Zhou Wei
10741566	Integrated arrangements of pull-up transistors and pull-down transistors, and integrated static memory	Bell Debra M.
10741567	Memory cells	Karda Kamal M.
10741636	Methods of fabricating a decoupling capacitor in a semiconductor structure	Wu Tieh-Chiang
10741658	Memory configurations	Bhattacharyya Arup
10741753	Conductive hard mask for memory device formation	Bernhardt Michael
10741755	Array of cross point memory cells	Sills Scott E.
10742406	Key generation and secure storage in a noisy environment	Pisasale Michelangelo
10746835	Memory arrays	Liu Zengtao T.
10747245	Apparatuses and methods for ZQ calibration	He Yuan
10747441	Efficient allocation of storage connection resources	Jean Sebastien Andre
10747463	Apparatuses and methods for accessing hybrid memory system	Kajigaya Kazuhiko
10747470	Semiconductor device with pseudo flow through scheme for power savings	Ho Michael V.
10747612	Multi-page parity protection with power loss handling	Singidi Harish Reddy
10747614	Hybrid iterative error correcting and redundancy decoding operations for memory sub-systems	Tai Ying Yu
10747693	Semiconductor device with a time multiplexing mechanism for size efficiency	Ho Michael V.
10748584	Apparatuses and methods for controlling data timing in a multi-memory system	Takahashi Tsugio
10748594	Enabling fast pulse operation	Sandhu Gurtej S.
10748596	Array data bit inversion	Ingalls Charles L.
10748598	Memory devices with selective page-based refresh	Akel Ameen D.
10748600	Phase charge sharing reduction	Rehmeyer James S.
10748613	Memory sense amplifiers and memory verification methods	Kitagawa Makoto
10748615	Polarity-conditioned memory cell write operations	Wang Hongmei
10748620	Memory block select circuitry including voltage bootstrapping control	Yip Aaron
10748624	Apparatus configured to respond to power loss	Bonitz Rainer
10748625	Dynamic programing of valley margins of a memory cell	Sheperek Michael
10748811	Memory devices and related methods	Ha Chang Wan
10748857	Die features for self-alignment during die bonding	Street Bret K.
10748872	Integrated semiconductor assemblies and methods of manufacturing the same	Kinsley Thomas H.
10748874	Power and temperature management for functional blocks implemented by a 3D stacked integrated circuit	Brewer Tony M.
10748878	Semiconductor device assembly with heat transfer structure formed from semiconductor material	Vadhavkar Sameer S.
10748914	Ferroelectric capacitor, ferroelectric field effect transistor, and method used in forming an electronic component comprising conductive material and ferroelectric material	Chavan Ashonita A.
10748918	Methods of forming semiconductor device structures including staircase structures	Tanzawa Toru
10748921	Integrated assemblies which include stacked memory decks, and methods of forming integrated assemblies	Liu Liu
10748922	Memory arrays and methods used in forming a memory array	Howder Collin
10748931	Integrated assemblies having ferroelectric transistors with body regions coupled to carrier reservoirs	Karda Kamal M.
10748987	Methods of forming an array of capacitors, methods of forming an array of memory cells individually comprising a capacitor and a transistor, arrays of capacitors, and arrays of memory cells individually comprising a capacitor and a transistor	Ramaswamy Durai Vishak Nirmal
10749041	Programmable charge storage transistor, an array of elevationally-extending strings of memory cells, methods of forming Si3Nx, methods of forming insulator material that is between a control gate and charge-storage material of a programmable charge-storage transistor, methods of forming an array of elevationally-extending strings of memory cells, a programmable charge-storage transistor manufactured in accordance with methods, and an array of elevationally-extending strings of memory cells man	Wang Fei
10749071	Apparatus for processing device structures	Bayless Andrew M.
10749680	Secure communication between a vehicle and a remote device	Troia Alberto
10754578	Memory buffer management and bypass	Hasbun Robert Nasry
10754580	Virtual partition management in a memory device	Della Monica Angelo
10754583	Level width based dynamic program step characteristic adjustment	Liikanen Bruce A.
10754725	Self-accumulating exclusive or program	Amato Paolo
10754726	Tracking error-correction parity calculations	Palmer David Aaron
10754787	Virtual address table	Leidel John D.
10754793	Memory module data object processing systems and methods	Murphy Richard C.
10754801	Individually addressing memory devices disconnected from a data bus	Schaefer Scott E.
10755111	Identifying suspicious entities using autonomous vehicles	Golov Gil
10755750	Power management integrated circuit load switch driver with dynamic biasing	Rowley Matthew David
10755751	Temperature-based memory operations	Confalonieri Emanuele
10755755	Apparatuses and methods for concurrently accessing different memory planes of a memory	Pekny Theodore T.
10755756	Apparatuses and methods for providing constant DQS-DQ delay in a memory device	Ma Yantao
10755758	Methods and apparatuses including command delay adjustment circuit	Ishibashi Shuichi
10755760	Time-based access of a memory cell	Di Vincenzo Umberto
10755763	Apparatuses and methods for detection refresh starvation of a memory	Morgan Donald M.
10755766	Performing logical operations using a logical operation component based on a rate at which a digit line is discharged	Hush Glen E.
10755781	Techniques for programming multi-level self-selecting memory cell	Robustelli Mattia
10755792	Block read count voltage adjustment	Singidi Harish Reddy
10755793	SLC page read	Singidi Harish
10755799	Apparatuses and methods for fuse latch redundancy	Montierth Dennis G.
10756014	Devices including vias extending through alternating dielectric materials and conductive materials, and related methods	Freeman Eric H.
10756022	Methods of alignment marking semiconductor wafers, and semiconductor packages having portions of alignment markings	Housley Richard T.
10756093	Methods of forming integrated assemblies	Pandey Deepak Chandra
10756105	Memory arrays and methods used in forming a memory array	Fukuzumi Yoshiaki
10756111	Integrated assemblies having thicker semiconductor material along one region of a conductive structure than along another region, and methods of forming integrated assemblies	Parekh Kunal R.
10756217	Access devices formed with conductive contacts	Liu Haitao
10756236	Textured optoelectronic devices and associated methods of manufacture	Xu Lifang
10756265	Methods for forming narrow vertical pillars and integrated circuit devices having the same	Liu Jun
10761275	Method of forming photonics structures	Sandhu Gurtej
10761588	Power configuration component including selectable configuration profiles corresponding to operating characteristics of the power configuration component	Rowley Matthew D.
10761725	Write command overlap detection	Palmer David A.
10761727	Scan frequency modulation based on memory density or block usage	Rayaprolu Vamsi Pavan
10761739	Multi-level wear leveling for non-volatile memory	Tai Ying Yu
10761740	Hierarchical memory wear leveling employing a mapped translation layer	Bradshaw Samuel E.
10761749	Vectorized processing level calibration in a memory component	Sheperek Michael
10761754	Adjustment of a pre-read operation associated with a write operation	Shen Zhenlei E.
10761769	Accessible accumulated memory temperature readings in a memory sub-system	Cadloni Gerald L.
10761773	Resource allocation in memory systems based on operation modes	Frolikov Alex
10761781	Apparatus and methods for a distributed memory system including memory nodes	Curewitz Kenneth M.
10761847	Linear feedback shift register for a reconfigurable logic unit	Hulton David
10761855	Securing conditional speculative instruction execution	Wallach Steven Jeffrey
10761978	Write atomicity management for memory subsystems	Hughes Nathan Jared
10761980	Trim setting determination on a memory device	Thiruvengadam Aswin
10761997	Methods of memory address verification and memory devices employing the same	Troia Alberto
10762003	State change in systems having devices coupled in a chained configuration	Radke William H.
10762936	Apparatuses including multiple read modes and methods for same	Pekny Theodore T.
10762944	Single plate configuration and memory array operation	Bedeschi Ferdinando
10762946	Memory with partial array refresh	Hiscock Dale H.
10762964	Methods and apparatuses including a string of memory cells having a first select transistor coupled to a second select transistor	Sakui Koji
10762968	Dynamic user-selectable trim profile in a memory component	Cadloni Gerald L.
10762971	Responding to power loss	Bonitz Rainer
10762974	One check fail byte (CFBYTE) scheme	Madraswala Aliasgar S.
10763131	Semiconductor device with a multi-layered encapsulant and associated systems, devices, and methods	Luo Shijian
10763155	Semiconductor constructions comprising dielectric material, and methods of forming dielectric fill within openings extending into semiconductor constructions	Sandhu Gurtej S.
10763185	Packaged semiconductor components having substantially rigid support members	Schwab Matt E.
10763186	Package cooling by coil cavity	Bayless Andrew M.
10763263	Semiconductor device having equivalent series resistance unit	Ota Ken
10763265	Integrated assemblies having continuous high-dielectric films extending across channel regions of adjacent transistors	Imamoto Takuya
10763905	Wireless devices and systems including examples of mismatch correction scheme	Luo Fa-Long
10766057	Components and systems for cleaning a tool for forming a semiconductor device, and related methods	Tokashiki Ken
10768526	Method of forming patterns	Chou Kuo-Yao
10768828	Data movement between volatile and non-volatile memory in a read cache memory	Feng Eugene
10768831	Non-persistent unlock for secure memory	Keeth Brent
10769014	Disposable parity	Cariello Giuseppe
10769071	Coherent memory access	Finkbeiner Timothy P.
10769097	Autonomous memory architecture	Eilert Sean
10769099	Devices for time division multiplexing of state machine engine signals	Noyes Harold B
10770125	Fixed voltage sensing in a memory device	Johnson Adam D.
10770126	Parallel access techniques within memory sections through section independence	Fackenthal Richard E.
10770127	Apparatuses and methods for managing row access counts	Shore Michael A.
10770130	Apparatuses and methods for maintaining a duty cycle error counter	Satoh Yasuo
10770143	Memory systems and memory programming methods	Kitagawa Makoto
10770145	Two-part programming methods	Sarin Vishal
10770152	Methods of operating a memory device comparing input data to data stored in memory cells coupled to a data line	Eldredge Kenneth J.
10770156	Memory devices and methods for read disturb mitigation involving word line scans to detect localized read disturb effects and to determine error count in tracked sub sets of memory addresses	Padilla Renato C.
10770168	Memory sub-system with background scan and histogram statistics	Cadloni Gerald L.
10770343	Methods of forming memory arrays	Ramaswamy Durai Vishak Nirmal
10770398	Graphics processing unit and high bandwidth memory integration using integrated interface and silicon interposer	Yoo Chan H.
10770421	Bond chucks having individually-controllable regions, and associated systems and methods	Bayless Andrew M.
10770422	Bond chucks having individually-controllable regions, and associated systems and methods	Bayless Andrew M.
10770435	Apparatuses and methods for semiconductor die heat dissipation	Vadhavkar Sameer S.
10770462	Circuit and layout for single gate type precharge circuit for data lines in memory device	Miyatake Shinichi
10770465	Method used in forming integrated circuitry	Kim Byeung Chul
10770466	Semiconductor devices comprising digit line contacts and related systems	Kobayashi Naoyoshi
10770470	Memory array having connections going through control gates	Tanzawa Toru
10770472	Memory arrays, and methods of forming memory arrays	Kim Changhan
10770497	Color filter array, imagers and systems having same, and methods of fabrication and use thereof	Ford Loriston
10775424	Capacitive voltage divider for monitoring multiple memory components	Rowley Matthew D.
10776016	Data caching for ferroelectric memory	Kajigaya Kazuhiko
10776031	Multi-partitioning of memories	Caraccio Danilo
10776037	Data replication	Willcock Jeremiah J.
10776047	Memory characteristic based access commands	Sun Honglin
10776127	Reducing data hazards in pipelined processors to provide high processor utilization	Crook Neal Andrew
10776201	Extended error correction in storage device	Palmer David Aaron
10776300	Dynamic allocation of resources of a storage system utilizing single root input/output virtualization	Duncan Kevin R.
10776362	Memory devices for pattern matching	De Santis Luca
10777232	High bandwidth memory having plural channels	Narui Seiji
10777236	Methods and apparatuses of driver circuits without voltage level shifters	Kim Tae H.
10777245	Vertical decoders	Redaelli Andrea
10777257	Output buffer circuit with non-target ODT function	Arai Tetsuya
10777266	Mixed cross point memory	Redaelli Andrea
10777277	Configuration of a memory device for programming memory cells	Moschiano Violante
10777281	Asymmetrical multi-gate string driver for memory device	Huang Guangyu
10777284	Read voltage calibration based on host IO operations	Malshe Ashutosh
10777286	Apparatus and methods for determining data states of memory cells	Moschiano Violante
10777291	Drift mitigation with embedded refresh	Tortorelli Innocenzo
10777292	Selectable trim settings on a memory device	Thiruvengadam Aswin
10777295	Defective memory unit screening in a memory system	Frolikov Alex
10777297	Age-based refresh of firmware	Gyllenskog Christian M.
10777500	Arrays of memory cells individually comprising a capacitor and a transistor and methods of forming such arrays	Ramaswamy Durai Vishak Nirmal
10777523	Semiconductor devices and semiconductor devices including a redistribution layer	Chandolu Anilkumar
10777530	Package-on-package semiconductor device assemblies including one or more windows and related methods and packages	Monroe Matthew
10777561	Semiconductor structure formation	Shreeram Devesh Dadhich
10777562	Integrated circuity, DRAM circuitry, methods used in forming integrated circuitry, and methods used in forming DRAM circuitry	Sandhu Gurtej S.
10777563	Cell disturb prevention using a leaker device to reduce excess charge from an electronic device	Ramaswamy Durai Vishak Nirmal
10777576	Integrated assemblies having charge-trapping material arranged in vertically-spaced segments, and methods of forming integrated assemblies	Kim Byeung Chul
10777651	Gate stacks	Hu Yushi
10777721	High-voltage solid-state transducers and associated systems and methods	Schubert Martin F.
10777722	Methods and apparatus providing thermal isolation of photonic devices	Meade Roy
10777739	Phase change memory cell with constriction structure	Liu Jun
10777743	Memory cell with independently-sized electrode	Ravasio Marcello
10778091	Electronic device with an output voltage booster mechanism	Piccardi Michele
10778093	Electronic device with a charge recycling mechanism	Piccardi Michele
10778245	Bit string conversion	Ramesh Vijay S.
10778403	Full duplex device-to-device cooperative communication	Luo Fa-Long
10778661	Secure distribution of secret key using a monotonic counter	Mondello Antonino
10778815	Methods and systems for parsing and executing instructions to retrieve data using autonomous memory	Curewitz Kenneth M
10779145	Wirelessly utilizable memory	Luo Fa-Long
10779147	Wireless memory interface	Mirichigni Graziano
10782345	Debugging a semiconductor device	Grosz Nadav
10782885	Memory including search logic	Patel Vipul
10782906	Memory subsystem interface to relate data and to retrieve related data	Bahirat Shirish D.
10782908	Predictive data orchestration in multi-tier memory systems	Mittal Samir
10782911	Data migration dynamic random access memory	Walker Robert M.
10782916	Proactive return of write credits in a memory system	Meyerowitz Trevor Conrad
10782980	Generating and executing a control flow	Wheeler Kyle B.
10783186	Heterogenous key-value sets in tree database	Boles David
10783934	Power management integrated circuit with dual power feed	Rowley Matthew David
10783937	Voltage reference computations for memory decision feedback equalizers	Sreeramaneni Raghukiran
10783940	Apparatuses and methods for setting a duty cycle adjuster for improving clock duty cycle	Kim Kang-Yong
10783942	Modified decode for corner turn	Kirsch Graham
10783949	Half density ferroelectric memory and operation	Derner Scott J.
10783961	Memory cells, memory systems, and memory programming methods	Otsuka Wataru
10783965	Apparatuses and methods including memory access in cross point memory	Kau DerChang
10783967	Apparatus and methods including source gates	Goda Akira
10783968	Distributed mode registers in memory devices	Mai Thanh K.
10783978	Read voltage-assisted manufacturing tests of memory sub-system	Chen Zhengang
10783980	Methods for parity error synchronization and memory devices and systems employing the same	Waldrop William C.
10784101	Using sacrificial solids in semiconductor processing	Thorum Matthew S.
10784192	Semiconductor devices having 3-dimensional inductive structures	Davis James E.
10784199	Component inter-digitated VIAS and leads	Kinney Christopher
10784212	Semiconductor devices having crack-inhibiting structures	Chun Hyunsuk
10784224	Semiconductor devices with underfill control features, and associated systems and methods	Yeruva Suresh
10784263	Semiconductor device having a memory cell and method of forming the same	Wu Nan
10784264	Integrated assemblies having body contact regions proximate transistor body regions; and methods utilizing bowl etches during fabrication of integrated assemblies	Juengling Werner
10784269	Memory device including pass transistors in memory tiers	Tanzawa Toru
10784273	Memory arrays and methods used in forming a memory array	Howder Collin
10784374	Recessed transistors containing ferroelectric material	Ramaswamy Durai Vishak Nirmal
10785067	Analog multiplexing scheme for decision feedback equalizers	Sreeramaneni Raghukiran
10785786	Remotely executable instructions	Luo Fa-Long
10788985	Apparatuses and methods for configurable memory array bank architectures	Gans Dean D.
10789015	Background operations in memory	Ross Frank F.
10789094	Hierarchical memory apparatus	Ramesh Vijay S.
10789126	Multiple memory devices having parity protection	Singidi Harish Reddy
10789177	Multiple memory type memory module systems and methods	Murphy Richard C.
10789182	System and method for individual addressing	Bell Debra
10789186	Apparatuses and methods including memory commands for semiconductor memories	Kim Kang-Yong
10789996	Shifting data in sensing circuitry	Penney Daniel B.
10789998	Memory bank signal coupling buffer and method	Shori Aidan
10790000	Apparatuses and method for reducing row address to column address delay	Kawamura Christopher
10790004	Apparatuses and methods for multi-bank and multi-pump refresh operations	Sakurai Kiyotake
10790005	Techniques for reducing row hammer refresh	He Yuan
10790008	Volatile memory device with 3-D structure including vertical pillars and memory cells vertically stacked one over anoher in multiple levels	Koya Yoshihito
10790012	Memory with a reduced array data bus footprint	Ho Michael V.
10790020	Memory cells, memory cell programming methods, memory cell reading methods, memory cell operating methods, and memory devices	Liu Jun
10790027	Seed operation for memory devices	Moschiano Violante
10790029	Temperature compensation in memory sensing	Vu Luyen
10790032	Managed NAND performance throttling	Blodgett Greg A.
10790036	Adjustment of read and write voltages using a space between threshold voltage distributions	Zhou Zhenming
10790039	Semiconductor device having a test circuit	Lee Hyunui
10790145	Methods of forming crystallized materials from amorphous materials	Chavan Ashonita A.
10790185	Methods of sealing openings, and methods of forming integrated assemblies	Yang Guangjun
10790251	Methods for enhancing adhesion of three-dimensional structures to substrates	Gambee Christopher J.
10790286	Apparatuses including 3D memory arrays, methods of forming the apparatuses, and related electronic systems	Juengling Werner
10790288	Memory arrays comprising ferroelectric capacitors	Juengling Werner
10790303	Integrated assemblies having charge-trapping material arranged in vertically-spaced segments, and methods of forming integrated assemblies	Kim Woohee
10790304	Integrated assemblies comprising ferroelectric transistors and non-ferroelectric transistors	Kinney Wayne I.
10795576	Data relocation in memory	Galbo Neal A.
10795582	Apparatuses and methods for simultaneous in data path compute operations	Lea Perry V.
10795603	Systems and methods for writing zeros to a memory array	Moon Byung S.
10795610	Read look ahead data size determination	Steinmetz Cory M.
10795653	Target architecture determination	Leidel John D.
10795746	Automated power down based on state of firmware	Parry Jonathan
10795759	Apparatuses and methods for error correction coding and data bus inversion for semiconductor memories	Riho Yoshiro
10795810	Wear-leveling scheme for memory subsystems	Bradshaw Samuel E.
10795828	Data validity tracking in a non-volatile memory	Yeap Boon Leong
10796728	Wiring with external terminal	Onda Takamitsu
10796729	Dynamic allocation of a capacitive component in a memory device	Badrieh Fuad
10796731	Providing power availability information to memory	Mirichigni Graziano
10796733	Apparatuses and methods for performing logical operations using sensing circuitry	Manning Troy A.
10796734	Apparatuses including temperature-based threshold voltage compensated sense amplifiers and methods for compensating same	Lam Boon Hor
10796736	Bank to bank data transfer	Lea Perry V.
10796742	Charge sharing between memory cell plates	Carman Eric S.
10796744	Cross-point memory cells, non-volatile memory arrays, methods of reading a memory cell, methods of programming a memory cell, methods of writing to and reading from a memory cell, and computer systems	Meade Roy E.
10796745	Temperature informed memory refresh	Alsasua Gianni Stephen
10796746	Frequency synthesis for memory input-output operations	Gans Dean
10796755	Permutation coding for improved memory cell operations	Amato Paolo
10796756	Permutation coding for improved memory cell operations	Amato Paolo
10796765	Operations on memory cells	Castro Hernan A.
10796778	Apparatuses and methods to control body potential in 3D non-volatile memory operations	Zhao Han
10796899	Silicon doping for laser splash blockage	Espina Angelo Oria
10796989	3D interconnect multi-die inductors with through-substrate via cores	Kirby Kyle K.
10797018	Methods for fabricating 3D semiconductor device packages, resulting packages and systems incorporating such packages	Nakano Eiichi
10797020	Semiconductor device assemblies including multiple stacks of different semiconductor dies	Thurgood Blaine J.
10797033	Apparatuses and methods for high sensitivity TSV resistance measurement circuit	Ide Akira
10797053	Gated diode memory cells	Bhattacharyya Arup
10797135	Asymmetric source/drain regions of transistors	Lee Si-Woo
10797237	Resistive memory architectures with multiple memory cells per access device	Liu Jun
10797664	Apparatuses and methods for a chopper instrumentation amplifier	Ide Akira
10797685	Jitter cancellation with automatic performance adjustment	Shi Dan
10797708	Apparatuses and methods for indirectly detecting phase variations	Takahashi Hiroki
10798840	Folding device stand for portable devices	Hoem Sophia
10802516	Apparatus and method of power transmission sensing for stacked devices	El-Mansouri Adam S.
10802525	Low-voltage bias generator based on high-voltage supply	Piccardi Michele
10802535	Resetting clock divider circuitry prior to a clock restart	Ito Koji
10802721	Memory devices configured to latch data for output in response to an edge of a clock signal generated in response to an edge of another clock signal	Lee Eric
10802754	Hardware-based power management integrated circuit register file write protection	Rowley Matthew David
10802907	Hierarchical buffering scheme to normalize non-volatile media raw bit error rate transients	Bradshaw Samuel E.
10802909	Enhanced bit flipping scheme	Fackenthal Richard E.
10803909	Power management component for memory sub system power cycling	Rowley Matthew D.
10803914	Selectively squelching differential strobe input signal in memory-device testing system	Swanson Joel Scott
10803922	Apparatuses and methods for internal voltage generating circuits	Hamada Takayori
10803923	Apparatuses and methods for providing clock signals in a semiconductor device	Kitagawa Katsuhiro
10803924	Internal write leveling circuitry	Liu Ming-Bo
10803926	Memory with on-die data transfer	Hiscock Dale H.
10803934	Mixed cross point memory	Redaelli Andrea
10803937	Operational signals generated from capacitive stored charge	Castro Hernan A.
10803938	Methods, articles, and devices for pulse adjustments to program a memory cell	Spessot Alessio
10803939	Techniques for programming a memory cell	Castro Hernan A.
10803944	Architecture for 3-D NAND memory	Morooka Midori
10803945	Apparatuses and methods for segmented SGS lines	Pan Feng
10803948	Sequential voltage ramp-down of access lines of non-volatile memory device	Fayrushin Albert
10803957	Monitoring and charging inhibit bit-line	Yamada Shigekazu
10803962	Current monitoring in semiconductor packages	Tanaka Tomoharu
10803963	Capacitive voltage divider for power management	Rowley Matthew D.
10803964	Responding to power loss	Bonitz Rainer
10803969	Memory authentication	Bell Debra M.
10804036	Structure and methods of forming the structure	Kwong Tae Heui
10804225	Power gate circuits for semiconductor devices	Matsubara Yasushi
10804256	Semiconductor die assemblies having molded underfill structures and related technology	Bitz Bradley R.
10804273	Memory arrays comprising vertically-alternating tiers of insulative material and memory cells and methods of forming a memory array	Ramaswamy Durai Vishak Nirmal
10804390	Semiconductor device with silicon pillar having a device isolation film contacting a surface thereof	Munetaka Yuki
10804447	Solid state lighting devices having improved color uniformity and associated methods	Schubert Martin F.
10805128	Wireless devices and systems including examples of full duplex transmission	Luo Fa-Long
10805422	Memory device with a multi-mode communication mechanism	Rowley Matthew D.
10807592	Vehicle navigation using object data received from other vehicles	Golov Gil
10809696	Scanning encoded images on physical objects to determine parameters for a manufacturing process	Principato Giuseppe
10809942	Latency-based storage in a hybrid memory system	Caraccio Danilo
10810097	Client-assisted phase-based media scrubbing	Bradshaw Samuel E.
10810119	Scrubber driven wear leveling in out of place media translation	Eno Justin
10810145	Methods for performing multiple memory operations in response to a single command and memory devices and systems employing the same	Prather Matthew A.
10811057	Centralized placement of command and address in memory devices	Yoshida Kazuhiro
10811059	Routing for power signals including a redistribution layer	Hamada Takayori
10811061	Reduced die size and improved memory cell restore using shared common source driver	Venkata Harish N.
10811064	Apparatuses and methods for setting a duty cycle adjuster for improving clock duty cycle	Kim Kang-Yong
10811066	Apparatuses and methods for targeted refreshing of memory	Jones William F.
10811081	Apparatuses for decreasing write pull-up time and methods of use	Takayama Shinichi
10811083	Integrated assemblies comprising supplemental sense-amplifier-circuitry for refresh	Derner Scott J.
10811090	Memory cell state in a valley between adjacent data states	Parthasarathy Sivagnanam
10811098	Programming of memory devices in response to programming voltages indicative of programming efficiency	Beltrami Silvia
10811101	Apparatuses and methods for transistor protection by charge sharing	Zhang Yafeng
10811267	Methods of processing semiconductor device structures and related systems	Tokashiki Ken
10811278	Method for packaging circuits	Poo Chia Y.
10811298	Patterned carrier wafers and methods of making and using the same	Lin Jing Cheng
10811313	Methods of fabricating conductive traces and resulting structures	Gambee Christopher J.
10811340	Integrated assemblies comprising redundant wiring routes, and integrated circuit decks having openings extending therethrough	Juengling Werner
10811355	Methods of forming semiconductor devices	Brown William R.
10811365	Semiconductor devices having crack-inhibiting structures	Arifeen Shams U.
10811372	Semiconductor devices with post-probe configurability	Davis James E.
10811387	Methods of operating microelectronic devices including a controller	Ye Seng Kim Dalson
10811419	Storage node shaping	Shreeram Devesh Dadhich
10811424	Integrated computing structures formed on silicon	Bhattacharyya Arup
10816275	Semiconductor device assembly with vapor chamber	Groothuis Steven K.
10817360	Apparatus and methods for debugging on a memory device	Lea Perry V.
10817363	Health characteristics of a memory device	Redaelli Marco
10817371	Error correction in row hammer mitigation and target row refresh	Rooney Randall J.
10817412	Methods for migrating information stored in memory using an intermediate depth map	Roberts David A.
10817414	Apparatuses and methods for memory device as a store for block program instructions	Zawodny Jason T.
10817423	Memory mapping for hibernation	Golov Gil
10817430	Access unit and management segment memory operations	McGlaughlin Edward C.
10817435	Queue-based wear leveling of memory components	Basu Reshmi
10817442	Apparatus and methods for in data path compute operations	Lea Perry V.
10817474	Adaptive rate compression hash processor	Hubris Alexander
10817569	Methods and devices for saving and/or restoring a state of a pattern-recognition processor	Noyes Harold B
10818323	Active boundary quilt architecture memory	Laurent Christophe Vincent Antoine
10818324	Memory array decoding and interconnects	Castro Hernan A.
10818336	Apparatus with a row hit rate/refresh management mechanism	Alzheimer Joshua E.
10818338	Methods for independent memory bank maintenance and memory devices and systems employing the same	Raad George B.
10818343	Techniques for charging a sense component	Raad George B.
10818345	Two-stage signaling for voltage driver coordination in integrated circuit memory devices	Sirocka Nathan Joseph
10818357	Memory device including multiple select gates and different bias conditions	Goda Akira
10818359	Apparatuses and methods for organizing data in a memory device	Hush Glen E.
10818361	Preemptive idle time read scans	Malshe Ashutosh
10818536	Microelectronic devices including redistribution layers	Shih Shing-Yih
10818665	Array of recessed access devices and an array of memory cells individually comprising a capacitor and a transistor	Sukekawa Mitsunari
10818666	Gate noble metal nanoparticles	Simsek-Ege Fatma Arzum
10818667	Integrated assemblies which include carbon-doped oxide, and methods of forming integrated assemblies	Tang Sanh D.
10818673	Methods of forming integrated assemblies having conductive material along sidewall surfaces of semiconductor pillars	Li Hong
10818681	Termination structures in stacked memory arrays	Hu Yi
10818760	Memory cells having electrically conductive nanodots and apparatus having such memory cells	Ramaswamy Nirmal
10819296	Apparatus for receiving or transmitting voltage signals	Maccarrone Agatino Massimo
10824336	Sequential memory access operations	Tanzawa Toru
10824371	Managed NAND data compression	Jean Sebastien Andre
10824502	Enhanced codeword for media persistence and diagnostics	Basu Reshmi
10824503	Systems and methods for performing a write pattern in memory devices	Howe Gary L.
10824527	Flash memory block retirement policy	Singidi Harish Reddy
10824573	Refresh and access modes for memory	Meier Nathaniel J.
10824829	Systems and methods to determine kinematical parameters	Tuttle John R.
10825484	Integrated assemblies which include non-conductive-semiconductor-material and conductive-semiconductor-material, and methods of forming integrated assemblies	Pandey Deepak Chandra
10825485	Apparatuses and methods for power efficient driver circuits	Hollis Timothy M.
10825487	Apparatuses and methods for generating a voltage in a memory	Tanaka Hitoshi
10825491	Systems and methods for writing zeros to a memory array	Moon Byung S.
10825492	Methods and apparatuses for command shifter reduction	Bell Debra
10825493	Feedback for multi-level signaling in a memory device	Karim M Ataul
10825494	DFE conditioning for write operations of a memory device	Penney Daniel B.
10825495	Apparatuses and methods for determining a phase relationship between an input clock signal and a multiphase clock signal	Lee Hyun Yoo
10825496	In-memory lightweight memory coherence protocol	Murphy Richard C
10825501	Pre-writing memory cells of an array	Derner Scott James
10825503	Systems and methods for maintaining refresh operations of memory banks using a shared address path	Lee Joosang
10825505	Apparatuses and methods for staggered timing of targeted refresh operations	Rehmeyer James S.
10825506	Systems and methods for improving output signal quality in memory devices	Ho Michael V.
10825507	Serializer	Watanabe Kenichi
10825523	Multi-decks memory device including inter-deck switches	Li Benben
10825524	Memory device with a common source select line for two memory portions of a logic sector	Pascucci Luigi
10825525	Programming non-volatile electronic memory device with NAND architecture	Pascucci Luigi
10825528	Memory devices having source lines directly coupled to body regions and methods	Goda Akira
10825535	Intra-code word wear leveling techniques	Pawlowski Joseph T.
10825540	Memory system quality integral analysis and configuration	Liikanen Bruce A.
10825544	Configurable post-package repair	Wieduwilt Christopher Gordon
10825545	Memory device loopback systems and methods	Fu Hui
10825686	Hydrosilylation in semiconductor processing	Thorum Matthew S.
10825691	Semiconductor structure stack	Lee Che-Chi
10825761	Electronic devices having tapered edge walls	Wirz Brandon P.
10825762	Methods of processing semiconductor devices	Wirz Brandon P.
10825782	Semiconductor packages and associated methods with solder mask opening(s) for in-package ground and conformal coating contact	Dhakal Avishesh
10825783	Semiconductor packages and devices	Shih Shing-Yih
10825815	Memory arrays	Tang Sanh D.
10825816	Recessed access devices and DRAM constructions	Gao Yunfei
10825828	Semiconductor devices and systems with channel openings or pillars extending through a tier stack, and methods of formation	Hopkins John D.
10825859	Solid state transducer devices with separately controlled regions, and associated systems and methods	Rhodehouse Robert R.
10825867	Cross-point memory array and related fabrication techniques	Castro Hernan A.
10825987	Fabrication of electrodes for memory cells	Zheng Pengyuan
10828924	Methods of forming a self-assembled block copolymer material	Millward Dan B.
10831377	Extended line width memory-side cache systems and methods	Murphy Richard C.
10831384	Memory device with power management	Myers Brock
10831389	Code word format and structure	Pawlowski Joseph Thomas
10831393	Partial save of memory	Leyda Jeffery J.
10831396	Data storage organization based on one or more stresses	Fisher Ryan G.
10831596	Enhanced error correcting code capability using variable logical to physical associations of a data block	Bradshaw Samuel E.
10831653	Forwarding code word address	Pawlowski Joseph Thomas
10831672	Memory management for a hierarchical memory system	Klein Dean A.
10831682	Command selection policy	La Fratta Patrick A.
10832745	Apparatuses and methods for performing operations using sense amplifiers and intermediary circuitry	Hush Glen E.
10832748	Memory system that supports dual-mode modulation	Hasbun Robert Nasry
10832754	Current monitor for a memory device	Hopper Kristen M.
10832759	Half-width, double pumped data path	Hadrick Mark K.
10832768	Data storage based on data polarity	Schreck John F.
10832769	Memory device with a charge transfer device	Raad George B.
10832779	Apparatuses and methods for automated dynamic word line start voltage	Srinivasan Dheeraj
10832791	Apparatuses and methods for soft post-package repair	Wilson Alan J.
10832792	Apparatuses and methods for adjusting victim data	Penney Daniel B.
10832793	Defective memory cell detection circuitry including use in automotive control systems	Johnson Christopher S.
10832910	Methods of fabricating a device	Chou Kuo-Yao
10833052	Microelectronic package utilizing embedded bridge through-silicon-via interconnect component and related methods	Shih Shing-Yih
10833059	Integrated assemblies comprising vertically-stacked decks of memory arrays	Juengling Werner
10833087	Semiconductor devices including transistors comprising a charge trapping material, and related systems and methods	Fishburn Fredrick D.
10833092	Methods of incorporating leaker-devices into capacitor configurations to reduce cell disturb, and capacitor configurations incorporating leaker-devices	Calderoni Alessandro
10833099	Apparatuses and methods for forming multiple decks of memory cells	Lu Zhenyu
10833205	Semiconductor constructions, methods of forming vertical memory strings, and methods of forming vertically-stacked structures	Hopkins John D.
10833206	Microelectronic devices including capacitor structures and methods of forming microelectronic devices	Smith Michael A.
10833580	Stage protection in multi-stage charge pumps	Piccardi Michele
10833630	Apparatuses and methods for temperature independent oscillators	Wu Jun
10833656	Autonomous duty cycle calibration	Tang Qiang
10833700	Bit string conversion invoking bit strings having a particular data pattern	Ramesh Vijay S.
10834853	Electronic device with a card-level thermal regulator mechanism and associated systems, devices, and methods	Tuttle Mark E.
10836400	Implementing safety measures in applications	Troia Alberto
10836402	Determination of reliability of vehicle control commands via redundancy	Golov Gil
10838637	Status management in storage backed memory package	Burns Michael
10838645	Memory writing operations with consideration for thermal thresholds	Basu Reshmi
10838732	Apparatuses and methods for ordering bits in a memory device	Hush Glen E.
10838799	Parallel error calculation	Waldrop William C.
10838805	Generating parity data based on a characteristic of a stream of data	Bahirat Shirish
10838807	Methods and system with dynamic ECC voltage and frequency	Parry Jonathan
10838812	Storing parity data mid stripe	Boals Daniel A.
10838813	Progressive length error control code	Pawlowski J. Thomas
10838831	Die-scope proximity disturb and defect remapping scheme for non-volatile memory	Bradshaw Samuel E.
10838865	Stacked memory device system interconnect directory-based cache coherence methodology	Leidel John
10838876	Memory module data object processing systems and methods	Murphy Richard C.
10838879	Memory protection based on system state	Dover Lance W.
10838886	Channel depth adjustment in memory systems	Walker Robert
10838897	Translation system for finer grain memory architectures	Keeth Brent
10838899	Apparatuses and methods for in-memory data switching networks	Lea Perry V.
10838966	Devices, systems, and methods to synchronize simultaneous DMA parallel processing of a single data stream by multiple devices	Noyes Harold B
10839862	Cross point array memory in a non-volatile dual in-line memory module	McGlaughlin Edward
10839867	Apparatuses and methods for parity determination using sensing circuitry	Manning Troy A.
10839868	Redundancy area refresh rate increase	He Yuan
10839870	Apparatuses and methods for storing a data value in a sensing circuitry element	Penney Daniel B.
10839871	Apparatuses and method for reducing sense amplifier leakage current during active power-down	Kawamura Christopher
10839873	Apparatus with a biasing mechanism and methods for operating the same	Lee Kyuseok
10839874	Indicating latency associated with a memory request in a system	Hasbun Robert Nasry
10839876	Apparatuses and methods for clock leveling in semiconductor memories	Ito Koji
10839878	Memory sub-system managing remapping for misaligned memory components	Porzio Luca
10839881	Dual mode ferroelectric memory cell operation	Vimercati Daniele
10839882	Dual mode ferroelectric memory cell operation	Vimercati Daniele
10839885	Systems and methods for performing row hammer refresh operations in redundant memory	Lee Joosang
10839888	Interpolation-based temperature-dependent power supply generation	Pan Dong
10839889	Apparatuses and methods for providing clocks to data paths	Lee Hyunui
10839890	Apparatuses and methods for subrow addressing	Hush Glen E.
10839891	Sense amplifier with lower offset and increased speed	Guo Xinwei
10839892	Comparison operations in memory	Wheeler Kyle B.
10839896	Programming multiple-level memory cells with multiple-pass	Lee Changhyun
10839927	Apparatus and methods for mitigating program disturb	Cantarelli Daniele
10839933	Memory devices having a read function of data stored in a plurality of reference cells	Kajigaya Kazuhiko
10840137	Methods of forming integrated circuits having parallel conductors	Hansen Tyler G.
10840209	Methods and systems for manufacturing semiconductor devices	Zhou Wei
10840210	Methods and systems for manufacturing semiconductor devices	Zhou Wei
10840229	Graphics processing unit and high bandwidth memory integration using integrated interface and silicon interposer	Yoo Chan H.
10840240	Functional blocks implemented by 3D stacked integrated circuit	Brewer Tony M.
10840249	Integrated circuitry constructions	Iwaki Takayuki
10840255	Methods of filling openings with conductive material, and assemblies having vertically-stacked conductive structures	Greenlee Jordan D.
10840410	Ultrathin solid state dies and methods of manufacturing the same	Odnoblyudov Vladimir
10840443	Method and apparatus providing multi-planed array memory device	Wells David H.
10840908	Systems and methods for controlling semiconductor device wear	Waldrop William C.
10840910	Apparatuses and methods for level shifting	Kitagawa Katsuhiro
10840913	Circuits, apparatuses, and methods for frequency division	Gomm Tyler J.
10840918	Phase lock circuitry using frequency detection	Takai Yasuhiro
10840924	Phase interpolator	Wurzer Steven G.
10840971	Pre-distortion for multi-level signaling	Spirkl Wolfgang Anton
10841076	Wireless devices and systems including examples of cross correlating wireless transmissions	Luo Fa-Long
10845866	Non-volatile memory system or sub-system	Hasbun Robert Nasry
10846008	Apparatuses and methods for single level cell caching	Doyle Daniel
10846021	Memory devices with programmable latencies and methods for operating the same	Prather Matthew A.
10846103	Methods and systems for representing processing resources	Glendenning Paul
10846158	Apparatus having multiplexers for passive input/output expansion and methods of their operation	Rajgopal Suresh
10846165	Adaptive scan frequency for detecting errors in a memory system	Brandt Kevin R.
10846175	High throughput bit correction of data inside a word buffer for a product code decoder	Parthasarathy Sivagnanam
10846215	Persistent content in nonvolatile memory	Hulbert Jared E.
10846248	Methods for performing multiple memory operations in response to a single command and memory devices and systems employing the same	Prather Matthew A.
10846955	Black box data recorder for autonomous driving vehicle	Golov Gil
10847193	Phase control between regulator outputs	Hollis Timothy Mowry
10847207	Apparatuses and methods for controlling driving signals in semiconductor devices	Yamamoto Nobuo
10847220	Apparatuses and methods for bi-directional access of crosspoint arrays	Castro Hernan A.
10847222	Timing control of voltage supply during polarity transition	Cui Mingdong
10847233	Memory devices and apparatus configured to apply positive voltage levels to data lines for memory cells selected for and inhibited from programming	Goda Akira
10847367	Methods of forming tungsten structures	Economy David R.
10847382	Solder bond site including an opening with discontinuous profile	Gandhi Jaspreet S.
10847433	Apparatuses and methods for coupling contact pads to a circuit in a semiconductor device	Igeta Masahiko
10847439	Heat spreaders for use with semiconductor devices	Pax George E.
10847442	Interconnect assemblies with through-silicon vias and stress-relief features	Li Hongqi
10847446	Construction of integrated circuitry and a method of forming an elevationally-elongated conductive via to a diffusion region in semiconductive material	Togashi Yuko
10847479	Antenna formation by integrated metal layer or redistribution layer	Fay Owen R.
10847482	Integrated circuit structures and methods of forming an opening in a material	Sugioka Shigeru
10847486	Uniform electrochemical plating of metal onto arrays of pillars having different lateral densities and related technology	Hacker Jonathan S.
10847508	Apparatus with a current-gain layout	Ishihara Takashi
10847511	Devices including control logic structures, electronic systems, and related methods	Beigel Kurt D.
10847512	Devices, memory devices, and electronic systems	Sills Scott E.
10847516	Memory cells and memory arrays	Mathew Suraj J.
10847518	Semiconductor devices, memory dies and related methods	Wang Kuo-Chen
10847526	Microelectronic devices including staircase structures, and related memory devices and electronic systems	Yip Aaron
10847527	Memory including blocking dielectric in etch stop tier	Simsek-Ege Fatma Arzum
10847533	Three-dimensional structured memory devices	Lee Ki Hong
10847538	Methods of forming an array of elevationally-extending strings of memory cells	Howder Collin
10847580	Thermal insulation for three-dimensional memory arrays	Fantini Paolo
10847651	Semiconductor devices including electrically conductive contacts and related systems and methods	Iwaki Takayuki
10847719	Tapered cell profile and fabrication	Redaelli Andrea
10847722	Buried low-resistance metal word lines for cross-point variable-resistance material memories	Liu Jun
10848059	Systems and methods involving charge pumps coupled with external pump capacitors and other circuitry	Muralidharan Arvind
10848153	Leakage current reduction in electronic devices	Akamatsu Hiroshi
10850684	Vehicle secure messages based on a vehicle private key	Troia Alberto
10852344	Inductive testing probe apparatus for testing semiconductor die and related systems and methods	Lindenberg Tony M.
10852737	Power management, dynamic routing and memory management for autonomous driving vehicles	Szubbocsev Zoltan
10852812	Power management integrated circuit with in situ non-volatile programmability	Rowley Matthew David
10852949	Predictive data pre-fetching in a data storage device	Frolikov Alex
10852953	Dynamic temperature compensation in a memory component	Koudele Larry J.
10852964	Host-resident translation layer validity check techniques	Grosz Nadav
10852978	Key-value store using journaling with selective data storage format	Kurichiyath Sudheer
10853238	Unaligned data coalescing	Palmer David A.
10853273	Secure memory system programming	Duval Olivier
10853309	Fuseload architecture for system-on-chip reconfiguration and repurposing	Pinilla Pico Lady Nataly
10854247	Apparatuses and methods to selectively perform logical operations	Penney Daniel B.
10854266	Full bias sensing in a memory array	Di Vincenzo Umberto
10854267	Virtual ground sensing circuitry and related devices, systems, and methods for crosspoint ferroelectric memory	Marotta Giulio Giuseppe
10854268	Memory plate segmentation to reduce operating power	Kim Tae H.
10854269	Apparatuses and methods for compute components formed over an array of memory cells	Zawodny Jason T.
10854270	Memory with internal refresh rate control	Smith Scott E.
10854271	Clock signal generator generating four-phase clock signals	Tsukihashi Toshiaki
10854272	Apparatuses and methods for controlling word line discharge	Sato Toshiyuki
10854273	Apparatuses and methods for controlling word drivers	Sato Toshiyuki
10854274	Apparatuses and methods for dynamic timing of row pull down operations	Grenzebach Adam J.
10854276	Apparatuses and methods including two transistor-one capacitor memory and for accessing same	Kawamura Christopher J.
10854286	Apparatuses, memories, and methods for address decoding and selecting an access line	Tang Stephen H.
10854287	Accessing memory cells in parallel in a cross-point array	Castro Hernan A.
10854293	Segmented memory operation	Tanzawa Toru
10854295	I/O buffer offset mitigation	Tang Qiang
10854299	Data erase operations for a memory system	Brandt Kevin R.
10854301	Apparatuses and methods for reducing read disturb	Pan Feng
10854303	Apparatus and methods for determining data states of memory cells	Vali Tommaso
10854304	Apparatus and methods for seeding operations concurrently with data line set operations	Xu Jun
10854305	Using a status indicator in a memory sub-system to detect an event	Miller Michael G.
10854307	Apparatuses and/or methods for operating a memory cell as an anti-fuse	Redaelli Andrea
10854310	Shared error detection and correction memory	Dono Chiaki
10854311	Data redirection upon failure of a program operation	Hieb Adam J.
10854514	Microelectronic devices including two contacts	Wu Tieh-Chiang
10854549	Redistribution layers with carbon-based conductive elements, methods of fabrication and related semiconductor device packages and systems	Nakano Eiichi
10854611	Memory cells and memory arrays	Mathew Suraj J.
10854617	Integrated components which have both horizontally-oriented transistors and vertically-oriented transistors	Derner Scott J.
10854674	Cross-point memory and methods for fabrication of same	Ravasio Marcello
10854675	Cross-point memory and methods for fabrication of same	Sciarrillo Samuele
10854747	NAND memory arrays, devices comprising semiconductor channel material and nitrogen, and methods of forming NAND memory arrays	Carlson Chris M.
10854813	Dopant-modulated etching for memory devices	Tortorelli Innocenzo
10855031	Securing a memory card	Troia Alberto
10855282	Buffer circuit	Hosaka Hiroki
10855295	Access schemes for section-based data protection in a memory device	Fackenthal Richard E.
10855314	Generating and using invertible, shortened Bose-Chaudhuri-Hocquenghem codewords	Parthasarathy Sivagnanam
10855316	Error correction code (ECC) operations in memory	Wu Yingquan
10855495	Timing based arbitration methods and apparatuses for calibrating impedances of a semiconductor device	Wieduwilt Christopher G.
10859661	Memory arrays	Liu Zengtao T.
10860036	Repurposing autonomous vehicles for package delivery	Szubbocsev Zoltan
10860219	Performing hybrid wear leveling operations based on a sub-total write counter	Zhu Fangfang
10860243	Per cursor logical unit number sequencing	Boals Daniel A.
10860388	Lock management for memory subsystems	Ozturk Ayberk
10860416	Tiered error correction code (ECC) operations in memory	Kaynak Mustafa N.
10860417	Multiple memory die techniques	Spirkl Wolfgang Anton
10860469	Apparatuses and methods for providing internal memory commands and control signals in semiconductor memories	Lee Hyun Yoo
10860470	Row hammer refresh for content-addressable memory devices	Zhang Yu
10860474	Multilevel addressing	Ferrante Gianfranco
10860479	Line termination methods	Grunzke Terry
10860482	Apparatuses and methods for providing data to a configurable storage area	Mirichigni Graziano
10861509	Asynchronous/synchronous interface	Nobunaga Dean K.
10861517	Systems and methods involving memory-side (NAND-side) write training to improve data valid windows	Maccarrone Agatino Massimo
10861519	Apparatuses and methods for targeted refreshing of memory	Jones William F.
10861529	Self-reference sensing for memory cells	Muzzetto Riccardo
10861531	Apparatuses and methods for providing additional drive to multilevel signals representing data	Hollis Timothy M.
10861533	Apparatuses and methods for data transmission offset values in burst transmissions	Spirkl Wolfgang A.
10861539	Neural network memory	Boniardi Mattia
10861542	Apparatuses and methods for sensing memory cells	Sforzin Marco
10861551	Memory cells configured to generate weighted inputs for neural networks	Minucci Umberto
10861552	Apparatus and methods including a bipolar junction transistor coupled to a string of memory cells	Tessariol Paolo
10861555	Methods of programming different portions of memory cells of a string of series-connected memory cells	Liang Ke
10861563	Apparatuses and methods for determining population count	Finkbeiner Timothy P.
10861565	Functional signal line overdrive	Piccardi Michele
10861567	Capacitive voltage modifier for power management	Rowley Matthew D.
10861573	Trim setting determination for a memory device	Thiruvengadam Aswin
10861579	Array plate short repair	Lovett Simon J.
10861765	Carrier removal by use of multilayer foil	Derderian James M.
10861782	Redistribution layers including reinforcement structures and related semiconductor device packages, systems and methods	Chun Hyunsuk
10861787	Memory device with bitline noise suppressing scheme	Sukekawa Mitsunari
10861797	Electrically or temperature activated shape-memory materials for warpage control	Street Bret K.
10861824	Microelectronic device packages, stacked microelectronic device packages, and methods for manufacturing microelectronic devices	Ye Seng Kim Dalson
10861825	Interconnect structures with intermetallic palladium joints and associated systems and methods	Gandhi Jaspreet S.
10862030	Semiconductor devices comprising silver	Tang Sanh D.
10862538	Transmission of vehicle route information by passive devices	Troia Alberto
10863119	Method, apparatus, and system providing an imager with pixels having extended dynamic range	Bock Nikolai E.
10866861	Deferred error-correction parity calculations	Palmer David Aaron
10866921	Apparatuses and methods for an operating system cache in a solid state device	Jung Juyoung
10867078	Multi-function, modular system for network security, secure communication, and malware protection	Chritz Jeremy B.
10867653	Access schemes for protecting stored data in a memory device	Matsubara Yasushi
10867655	Methods and apparatus for dynamically adjusting performance of partitioned memory	Harms Jonathan D.
10867660	Apparatus and methods for controlling refresh operations	Akamatsu Hiroshi
10867661	Main word line driver circuit	Kim Tae H.
10867662	Apparatuses and methods for subarray addressing	Hush Glen E.
10867670	Comparing input data to stored data	Castro Hernan A.
10867671	Techniques for applying multiple voltage pulses to select a memory cell	Hamada Josephine T.
10867675	Apparatuses and methods for memory including ferroelectric memory cells and dielectric memory cells	Derner Scott J.
10867684	Driving access lines to target voltage levels	Piccardi Michele
10867685	Methods for detecting and mitigating memory media degradation and memory devices employing the same	Parry Jonathan S.
10867689	Test access port architecture to facilitate multiple testing modes	Spica Michael Richard
10867692	Apparatuses and methods for latching redundancy repair addresses at a memory	Morzano Christopher
10867837	Methods of forming integrated circuitry	Sukekawa Mitsunari
10867964	Semiconductor assemblies using edge stacking and methods of manufacturing the same	Kinsley Thomas H.
10867991	Semiconductor devices with package-level configurability	Duesman Kevin G.
10868032	Dielectric extensions in stacked memory arrays	Tessariol Paolo
10868078	Methods of forming integrated circuitry	Sukekawa Mitsunari
10868080	Memory for embedded applications	Redaelli Andrea
10868194	Transistors comprising at least one of GaP, GaN, and GaAs	Ramaswamy Durai Vishak Nirmal
10868212	Epitaxial formation structures and associated methods of manufacturing solid state lighting devices	Pinnington Thomas
10868248	Tapered memory cell profiles	Pirovano Agostino
10868519	Apparatuses and methods for calibrating adjustable impedances of a semiconductor device	Gans Dean
10869190	Secure vehicular services communication	Mondello Antonino
10871907	Sequential data optimized sub-regions in storage devices	Palmer David Aaron
10871923	Management of program suspend and resume operations of a memory sub-system	Wu Jiangang
10871968	Managed multiple die memory QoS	Jean Sebastien Andre
10872008	Data recovery after storage failure in a memory system	Crowley James P.
10872009	Mitigating a voltage condition of a memory cell in a memory sub-system	Rayaprolu Vamsi Pavan
10872010	Error identification in executed code	Mondello Antonino
10872039	Managing redundancy contexts in storage devices using eviction and restoration	Crowley James P.
10872403	System for predicting properties of structures, imager system, and related methods	Majumdar Amitava
10872639	Recovery of memory from asynchronous power loss	Luo Xiangang
10872640	Capacitive voltage dividers coupled to voltage regulators	Rowley Matthew D.
10872643	Systems and methods for a centralized command address input buffer	Uemura Yutaka
10872646	Apparatuses and methods for providing active and inactive clock signals	Lee Hyun Yoo
10872648	Apparatuses and methods for reducing row address to column address delay	Ingalls Charles L.
10872650	Ferroelectric memory cells	Derner Scott J.
10872654	Sub-word line driver with soft-landing	Lee Kyuseok
10872658	Reduced shifter memory system	Brown Jason M.
10872666	Source line management for memory cells with floating gates	Fackenthal Richard E.
10872670	Methods for determining data states of memory cells	Russo Ugo
10872674	Regulation of voltage generation systems	Tripathi Manan
10872676	Methods of performing read count leveling for multiple portions of a block of memory cells	Liang Ke
10872678	Speculative section selection within a memory device	Fackenthal Richard E.
10872835	Semiconductor assemblies including vertically integrated circuits and methods of manufacturing the same	Yoo Chan H.
10872843	Semiconductor devices with back-side coils for wireless signal and power coupling	Kirby Kyle K.
10872852	Wafer level package utilizing molded interposer	Shih Shing-Yih
10872894	Memory circuitry having a pair of immediately-adjacent memory arrays having space laterally-there-between that has a conductive interconnect in the space	Juengling Werner
10872903	Three dimensional memory and methods of forming the same	Tang Sanh D.
10872951	Semiconductor devices including capacitor structures having improved area efficiency	Freeman Eric H.
10877467	Structured server access for manufactured product based on scanning of encoded images	Principato Giuseppe
10877541	Power delivery timing for memory	Benjamin Keith A.
10877678	Selection component that is configured based on an architecture associated with memory devices	Rajgopal Suresh
10877679	Partially written block treatment	Parthasarathy Sivagnanam
10877687	Erasure of multiple blocks in memory devices	Rori Fulvio
10877694	Command selection policy with read priority	La Fratta Patrick A.
10877832	Data-structure based dynamic program targeting control	Sheperek Michael
10877835	Write buffer management	Wang Wei
10877880	Unretiring memory device blocks	Brandt Kevin R
10877882	Garbage collection adapted to user device access	Liang Qing
10877889	Processor-side transaction context memory interface systems and methods	Roberts David Andrew
10877892	Predictive paging to accelerate memory access	Ray Anirban
10877894	Memory-side transaction context memory interface systems and methods, wherein first context and first address are communicated on plural wires during different clock cycles and second context (of block of the first context) is communicated on additional wire during one of the different clock cycles	Roberts David Andrew
10877896	Adaptive readahead cache manager based on detected active streams of read commands	Palmer David A.
10877906	Scheduling of read operations and write operations based on a data bus mode	Wang Wei
10877908	Isolation component	Lendvay William A.
10877925	Vector processor with vector first and multiple lane configuration	Wallach Steven Jeffrey
10877999	Programmatically identifying a personality of an autonomous vehicle	Bielby Robert Richard Noel
10878854	Voltage generation circuit	Pan Dong
10878856	Data transfer between subarrays in memory	Zawodny Jason T.
10878858	Apparatuses including input buffers and methods for operating input buffers	Matsuno Hiroyuki
10878859	Utilizing write stream attributes in storage write commands	Suhler Paul A.
10878861	Variable filter capacitance	Bedeschi Ferdinando
10878862	Apparatuses and methods for DRAM wordline control with reverse temperature coefficient delay	Joo Yangsung
10878863	Apparatuses and methods for performing logical operations using sensing circuitry	Manning Troy A.
10878874	Techniques and devices for canceling memory cell variations	Hattori Yasuko
10878876	Apparatuses and methods for providing power for memory refresh operations	Brown Jason M.
10878882	Systems and methods for performing dynamic on-chip calibration of memory control signals	Piccardi Michele
10878883	Apparatuses and methods for cache invalidate	Murphy Richard C.
10878884	Apparatuses and methods to reverse data stored in memory	Zawodny Jason T.
10878885	Apparatuses and methods for in-memory operations	Lea Perry V.
10878886	Memory device write circuitry	Venkata Harish N.
10878910	Memory start voltage management	Cadloni Gerald L.
10878932	Apparatuses and methods including nested mode registers	Mazumder Kallol
10878933	Apparatuses and methods for memory testing and repair	Jeddeloh Joe M.
10879071	Methods of forming assemblies including semiconductor material with heavily-doped and lightly-doped regions	Hu Yushi
10879113	Semiconductor constructions; and methods for providing electrically conductive material within openings	Collins Dale W.
10879175	Memory devices including stair step or tiered structures and related methods	Tessariol Paolo
10879178	Electrically conductive laminate structures	Sandhu Gurtej S.
10879195	Method for substrate moisture NCF voiding elimination	Wirz Brandon P.
10879247	Semiconductor constructions, and semiconductor processing methods	Kiehlbauch Mark
10879255	Apparatuses including memory arrays with source contacts adjacent edges of sources	Tanzawa Toru
10879259	Methods and apparatuses having memory cells including a monolithic semiconductor channel	Sun Jie
10879265	Microelectronic devices and related methods	Freeman Eric H.
10879267	Microelectronic devices including staircase structures, and related memory devices and electronic systems	Luo Shuangqiang
10879344	Memory cells comprising ferroelectric material and including current leakage paths having different total resistances	Balakrishnan Muralikrishnan
10879428	Solid-state transducer devices with selective wavelength reflectors and associated systems and methods	Schubert Martin F.
10879444	Vertical solid-state transducers and high voltage solid-state transducers having buried contacts and associated systems and methods	Odnoblyudov Vladimir
10879459	Phase change memory cell with constriction structure	Liu Jun
10879462	Devices including multi-portion liners	Campbell Kyle B.
10880361	Sharing a memory resource among physically remote entities	Boehm Aaron P.
10880401	Optimization of data access and communication in memory systems	Maharana Parag R.

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