|||
void InitSysCtrl(void)
// Disable watchdog module
SysCtrlRegs.WDCR=0x0068;
// Initialize PLL
SysCtrlRegs.PLLCR= 0xA;
//CLKIN=(OSCCLK*10.0)/2 此指令将PLL使能延时,等待PLL使能(即为锁相环上锁)
for (i=0;i<5000;i++){}
//Wait for PLL to lock
//HISPCP/LOSPCP prescale register settings,normally it will be set to default values
//高速时钟定标HSPCLK=SYSCLKOUT/(HISPCP*2)
SysCtrlRegs.HISPCP.all=0x0001;
//低速时钟定标LSPCLK=SYSCLKOUT/(LOSPCP*2)
SysCtrlRegs.LOSPCP.all=0x0002;
//Peripheral clock enables set for the selected peripherals.
//SysCtrlRegs.PCLKCR.bit.EVAENCLK=1;
//EV-B外设高速时钟有效
SysCtrlRegs.PCLKCR.bit.EVBENCLK=1;
//SysCtrlRegs.PCLKCR.bit.SCIENCLKA=1;
//SysCtrlRegs.PCLKCR.bit.SCIENCLKB=1;
//SysCtrlRegs.PCLKCR.bit.SPIENCLK=1;
摘自《TMS320C281X手册》
Archiver|手机版|科学网 ( 京ICP备07017567号-12 )
GMT+8, 2024-4-26 01:32
Powered by ScienceNet.cn
Copyright © 2007- 中国科学报社