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[转载]【电子技术】【2011.07】基于FPGA的低压物理不可克隆功能研究

已有 133 次阅读 2020-12-2 17:10 |系统分类:科研笔记|文章来源:转载


本文为美国弗吉尼亚理工大学(作者:Kanu Priya)的硕士论文,共70页。

 

物理不可克隆功能(PUF)提供了一种安全、节能和非易失性的芯片识别方法。这些功能类似于单向函数,这些函数易于创建,但不可能复制。它们为许多FPGA(现场可编程门阵列)问题提供解决方案,如知识产权、芯片认证、密钥生成和可信计算。此外,FPGA作为柔性逻辑电路的重要平台,为PUF的安全实现提供了一种有吸引力的媒介。

 

在这篇论文中,我们探讨在低电压下,环振荡器物理不可克隆功能(RO-PUF)在FPGA上的行为。我们通过应用环境变化(如温度变化)来研究其稳定性,以表征其有效性。实验结果表明,随着电压的降低和稳定性的提高,RO的频率分布会变宽。然而,由于FPGA在低电压下固有的电路挑战,RO-PUF无法产生稳定的响应。研究发现,在低压下,反渗透频率越大,计数器值波动越大,导致PUF不稳定。我们还探讨了FPGA的不同结构组件,以解释RO-PUF的不稳定性。分析了FPGA在低电压下不支持数据的原因,给出了不可靠的数据。因此,需要一个低压FPGA来验证RO-PUF的稳定性。为了强调我们的案例,我们将探讨在FPGA上进行的低功耗应用研究。我们得出结论:FPGA虽然灵活,功耗低,但需要在结构和电路层面进行优化,以在低电压下产生稳定的响应

 

Physical Unclonable Functions (PUFs) provide a secure, power efficient and non-volatile means of chip identification. These are analogous to one-way functions that are easy to create but impossible to duplicate. They offer solutions to many of the FPGA (Field Programmable Gate Array) issues like intellectual property, chip authentication, cryptographic key generation and trusted computing. Moreover, FPGA evolving as an important platform for flexible logic circuit, present an attractive medium for PUF implementation to ensure its security. In this thesis, we explore the behavior of RO-PUF (Ring Oscillator Physical Unclonable Functions) on FPGA when subjected to low voltages. We investigate its stability by applying environmental variations, such as temperature changes to characterize its effectiveness. It is shown with the help of experiment results that the spread of frequencies of ROs widens with lowering of voltage and stability is expected. However, due to inherent circuit challenges of FPGA at low voltage, RO-PUF fails to generate a stable response. It is observed that more number of RO frequency crossover and counter value fluctuation at low voltage, lead to instability in PUF. We also explore different architectural components of FPGA to explain the unstable nature of RO-PUF. It is reasoned out that FPGA does not sustain data at low voltage giving out unreliable data. Thus a low voltage FPGA is required to verify the stability of RO-PUF. To emphasize our case, we look into the low power applications research being done on FPGA. We conclude that FPGA, though flexible, being power inefficient, requires optimization on architectural and circuit level to generate stable responses at low voltages.

 

 

1.  引言

2.  物理不可克隆功能

3.  FPGA结构

4.  低功耗应用的低电压FPGA

5.  低电压FPGA上的PUF研究

6.  结论


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