本文为加拿大多伦多大学（作者：Joshua Fender）的硕士论文，共174页。

基于FPGA的硬件开发系统对于探索视觉、图形和许多其他计算密集型问题中令人兴奋的应用非常有益。以往系统的经验表明，存储器容量、FPGA内部带宽、主机到FPGA带宽和存储器带宽都是高性能系统成功实现的关键。本文介绍了一种新的基于FPGA的开发系统的设计和实现，该系统的目标是在这四个方面提供尽可能优秀的性能。本设计采用8GB内存，并对其带宽性能进行了测试。系统总的聚合内存带宽为17.6GB/s，主机到FPGA的带宽为154MB/s（读）和266MB/s（写）。最终结果是一个能够实现未来应用的工作开发系统。  

FPGA-based hardware development systems areextremely useful for exploring exciting applications in vision, graphics, andmany other computationally intensive problems. Experience with previous systemshas shown that memory capacity, inter-FPGA bandwidth, host-to-FPGA bandwidth,and memory bandwidth are all critical to the successful implementation of highperformance systems. This thesis presents the design, and implementation, of anew FPGA-based development system that was created with the goal of providingas much performance in these four areas as feasible. The design was built with8GB of memory and its bandwidth performance was measured. The system has17.6GB/s total aggregate memory bandwidth, and 154MB/s (read) and 266MB/s(write) host-to-FPGA bandwidth. The result is a working development system thatis capable of implementing the applications of the future.

1. 引言

2. 项目背景

3. 具体设计

4. 电路板设计

5. 结果

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