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本文为美国东北大学(作者:Scott Michael Bailie)的硕士论文,共81页。
增量聚类是将动态流数据样本无监督地分类到相关的组(称为类别)中,该过程只对每个数据样本使用一次,因此它适用于低延迟解决方案的实时问题。其中一个应用是电子战(EW)系统中雷达脉冲流的分选。给定一个雷达信号流的组合,尝试根据接收信号的特性识别单个雷达辐射源。本文针对雷达脉冲分选的问题,在现场可编程门阵列(FPGA)上实现了一种增量聚类算法。介绍了一种改进的进化数据增量聚类算法ICED,并对其在FPGA中的具体实现进行了讨论。实验结果表明,该算法适用于电子战脉冲分选的实时要求。最终的设计提供了一个16种类别的分选实现,它消耗了Xilinx Virtex-5 SX95T FPGA的70%资源,并且需要420ns的处理延迟,从而实现了软件的39x加速。
Incremental clustering is the unsupervised classification of dynamic streaming data samples into related groups called clusters. The process considers each data point only once so it is applicable to real-time problems requiring low latency solutions. One such application is the deinterleaving of radar pulse streams in an electronic warfare (EW) systems. Given a single stream of combined radar signals deinterleaving attempts to identify individual radar emitters based on characteristics of the received signal. This thesis focuses on implementing an incremental clustering algorithm on a fieldprogrammable gate array (FPGA) for the purposes of radar pulse deinterleaving. We introduce ICED, an algorithm for the I ncremental C lustering of Evolving Data, and discuss the details of implementing it in an FPGA. Experimental results show the applicability of the algorithm to the real-time requirements of EW pulse deinterleaving. The resulting design provides a 16 cluster implementation that consumes 70% of a Xilinx Virtex-5 SX95T FPGA and requires a processing latency of 420ns, resulting in a 39x speedup over software.
1 引言
2 项目背景
2.1 电子战系统
2.2 分选方法
2.3 聚类方法
2.4 相关工作
2.5 结论
3 ICED算法
3.1 系统I/O
3.2 算法参数
3.3 算法细节
3.4 结论
4 FPGA实现
4.1 实现目标
4.2 布线布局
4.3 主要模块组件
4.4 结论
5 结果
5.1 实验设置
5.2 结果
5.3 结论
6 结论与未来工作展望
6.1 结论
6.2 未来工作展望
6.3 总结
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